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    Combinational Logic Control of SIL-200 Y-Molecular Sieve Vertical Roasting Stove
    SIL-200 Y型分子筛立式焙烧炉的组合逻辑控制
    Discuss the way of communal technique to design combinational logic circuits
    公用技术组合逻辑电路设计方法的初步探讨
    Research and Realization of Combinational Logic Synthesis in VHDL High-Level Synthesis System
    VHDL高级综合系统中组合逻辑综合的研究与实现
    N (23,12) is an asynchronous combinational logic circuit which can be implemented with 12 majestic-logic gates and 77 exclusive-OR gates.
    N(23,12)是一个异步的组合逻辑电路,能用12个大数逻辑门和77个异或门电路来实现。
    It is also configured for all 3 input logic and some logic between 4 and 7 input,and used for general combinational logic.
    该单元还能实现全部 3输入逻辑和部分 4~ 7输入逻辑 ,也是一种满足通用逻辑应用的结构 .
    This thesis introduces the application of Simulink in the teaching of the digital circuit in both theory and experiment, and concisely narrates its main properties through examples about Combinational Logic Circuits and Sequential Logic Circuits.
    本文介绍了Simulink模拟工具在数字电路理论和实验教学中的应用,通过组合逻辑、时序逻辑电路实例简述其主要特点。
    Fabricated in a CMOS/LDMOS process based on SDB/SOI substrate,the circuit contains a D/A converter,a dual-channel comparator,flip-flops,and combinational logic circuits,as well as over-frequency and over-voltage protection circuits.
    该电路内含D/A转换器、双路比较器、触发器和组合逻辑电路,以及过频过压保护等功能,采用键合SOI深槽的CMOS/LDMOS工艺制作。
    Combinational Logic
    组合逻辑
    The Methodlogy of Dynamic Testing For Combinational Logic Circuits
    组合逻辑线路动态测试方法论
    HAZARD IDENTIFICATION IN COMBINATIONAL LOGIC CIRCUITS
    组合逻辑线路的冒险识别
    DETECTION OF BRIDGING FAULT IN A COMBINATIONAL LOGIC NETWORK
    组合逻辑网络中短路故障的探测
    A New Afethod for Fault Testing in Combinational Logic Circuits
    用布尔差分求组合逻辑线路故障测试码的一种新方法
    THE SIGNATURE TESTABILITY OF COMBINATIONAL LOGIC CIRCUITS
    组合逻辑线路的特征量可测试性
    A Rapid Method for Generating Complete Test Sets for Combinational Logic Circuits
    快速产生组合电路初始输入引线完全测试集的一个算法
    Multiple Literal - Faults in Logic Functions and a Test Generation Method for Combinational Logic Circuits
    逻辑函数的多文字故障与组合线路测试集的生成方法
    A STUDY ON THE MULTI-LEVEL PROGRAMMING AFTER MINIMIZATION OF MULTIPLE OUTPUT COMBINATIONAL LOGIC
    多输出组合逻辑化简后的多级化程序研制报告
    NOISE ANALYSIS OF SOFT ERRORS IN MULTIPLE OUTPUT COMBINATIONAL LOGIC SYSTEMS
    多输出组合逻辑系统中软故障的分析
    Design of Combinational Logic Cir cuit Using Microcomputer
    利用微型计算机设计组合逻辑电路
    MSI COMBINATIONAL LOGIC DESIGN UTILZING REDUCED-DIMENSION MAP
    用降维图设计MSI组合逻辑
    CASCADE NETWORKS DESIGN OF COMBINATIONAL LOGIC FUNCTION USING MULTIPLEXER UNITS
    MUX級联网络的組合設計
 

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