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    A STRATEGY FOR WHOLE MACHINE BEHAVIORAL FUNCTIONAL LEVEL SIMULATION OF MB86901 SPARC RISC CHIP
    MB86901 SPARC RISC芯片全机行为功能级模拟策略的研究
    The technology treatment with IC in VDSM, for example logic level simulation, ATPG, routing and placement, must consider the interconnect effect.
    在VDSM工艺下,对IC电路进行逻辑级模拟验证、测试生成、布局和布线等技术处理时,均要考虑互连效应所产生的影响,只有这样才能较真实地反映电路的特性。
    With the development at top speed of VLSI technology, especially the appearance of RISC and ASIC, behavior funclion level simulation has becomc a necessary tool of digital system designers.
    随着VLSI技术的高速发展,特别是RISC和ASIC的出现,行为功能级模拟已成为数字系统设计人员的必要工具。
    The characteristics of Verilog-A HDL are introduced and the flow of system level simulation using Verilog-A behavioral model is analyzed.
    分析了模拟硬件描述语言Verilog-A的特点,介绍了基于Verilog-A语言的行为级模拟电路设计过程。
    SYSTEM LEVEL SIMULATION, EMULATION AND DEBUGGING TECHNOLOGY FOR PROCESSOR——NEW METHODOLOGY BASED ON HARDWARE/SOFTWARE CODESIGN
    面向处理器的系统级模拟、仿真及调试技术——基于软硬件协同设计的新方法
    Interconnect effect, especially crosstalk disturbs the logic and time sequence badly, the traditional logic level simulation can not reflect the factual state of circuit.
    互连效应,特别是其中的串扰问题对电路的逻辑和时序有着严重的影响,仅凭传统的逻辑级模拟已经不能反映电路的真实情况。
    Coupling capacitance and dynamic switches of signals are two important crosstalk factor. Dynamic switches of signals decide the generation of crosstalk. So the waveforms relation generated by logic level simulation has important effect on the estimation and optimization of crosstalk.
    耦合电容和动态的信号跳变情况是产生串扰的两个重要因素,其中后者决定了串扰能否发生,因此通过逻辑级模拟产生的波形关系对串扰估计和优化就具有了重要作用。
    A Boolean Process-based logic level simulation method is presented in this dissertation.
    本文提出了基于Boole过程论的逻辑级模拟验证方法。
    The instruction level simulation discussed in this paper is a system simulation for a CPU, and is also an effective software debugging tool.
    本文论述的指令级模拟,是计算机主机的一种系统模拟,也可作为一种有效的软件调试工具。
    This paper presents a powerful and pract ical CAD tool for designers-behavior function level simulation system (BFLSIM). In this paper , we systematically discuss the function, the structure, the characte ristics and simulation model of BFLSIM. In the end, we introduce a flexible and convenient user's interface-DCL and DEBUG environments, which can increase the system efficience and practicality.
    本文叙述了一个实用的功能强大的CAD工具—行为功能级模拟系统BFLSIM,并系统地讨论了BFLSIM的功能、结构、特性和模拟模型,最后介绍了一个灵活方便的用户接口—DCL和DEBUG环境,提高了系统效率和实用性。
    The focus of MEMS production has changed from the developmentof a single MEMS device to the development of a whole MEMS system. So the system level simulation of MEMS systems becomes more and more important.
    随着MEMS产业重点从单个的MEMS器件向MEMS系统产品的转移 ,MEMS系统级模拟变得日益重要 .
    Structured CAD methodology for integrated MEMS design is introduced,together with the modeling and simulation level of MEMS systems. Emphasis is put on the generation of micro models and the realization of system level simulation.
    文中主要介绍了MEMS系统的一些结构化、标准化的设计方法以及MEMS系统建模与模拟的分级 ,重点阐述了MEMS器件级与系统级模拟之间的桥梁———宏模型的建立及系统级模拟的实现。
    This macromodel only consumes 1%~0.1% run time of the gate level simulation and its relative error is no more than 20%.
    与门级模拟结果相比较 ,本模型的计算时间下降了 2~ 3个数量级 ,而相对误差不超过 2 0 % .
    As a key phase,the system level simulation of MEMS devices plays an important role in MEMS devices optimization. According to the conventional approach of the system level simulation,the macro models that can be connected seamlessly to electric networks simulating tools should be first created. Then the MEMS devices are analyzed with these simulating tools.
    MEMS器件的系统级模拟是实现器件优化的重要环节 ,常用的MEMS器件系统级模拟方法是基于宏模型 ,该宏模型要能与电路模拟软件相连接 ,再用电路模拟软件进行系统级模拟
    For two key technical issues in VHDLAMS based behaviorlevel simulation of analog systems: behaviorlevel simulation efficiency and processing method for break list of BREAK statement in VHDLAMS, an effective Jacobian matrix construction method, matrix solution algorithm and calculation method for predefined attributes are presented in the paper The performances of these methods are validated by simulation examples
    针对基于VHDL-AMS的模拟系统的行为级模拟领域里两类关键的技术问题:行为级模拟速度问题和中断(BREAK)语句的中断列表处理问题,提出了有效的Jacobian矩阵构造方法、矩阵方程求解算法和预定义属性的计算方法。 最后,通过实例验证了这些方法的功效。
    In order to promote the establishment of reusable intellecture propery(IP)for MEMS ,the behavior analog hardware description language is used to describe system dynamical behavior characterized as coupled sets of ordinary differential and algebraic equations(DAEs ). Using macromodels of MEMS together with models of electronics,the system level simulation can be performed to predict global performance.
    模拟硬件描述语言(如VHDL-AMS)提供了一种有效的方法,即建立起表示MEMS器件动态特性的常微分方程和代数方程(DAE),然后对其描述,形成相应的库单元,利用现有电路分析软件进行系统级模拟
    The transistor level simulation of the digital part of the three-latch source driver was done by HSPICE to demonstrate the data re-arrangement.
    HSPICE软件进行晶体管级模拟结果验证了三级锁存源驱动器的数据重组功能。
 

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