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减法
相关语句
  subtracting
    Analysis of CMRR of Two Basic Subtracting Circuits
    两种基本减法运算电路共模抑制比(CMRR)的分析
短句来源
    Experiments showed that the gain-bandwidth of the subtracting operational amplifier is the key of hardware method.
    实验表明减法运算放大器增益带宽是硬件方法的关键。
短句来源
    After analyzing third harmonic, it is showed that, in some range of definite frequency, the increase in the gain-bandwidth of the subtracting operational amplifier will effectively reduce the amplitude of third harmonic.
    对实验数据的三次谐波的分析表明,在一定频率范围内,提高减法运算放大器的增益带宽能有效减少三次谐波的幅度。
短句来源
    This paper analyzes the differences of CMRR caused by the deviation of accuracy of resistance matching in two basic subtracting circuits. It expounds that the subtracting circuit consisting of single amp.
    本文分析两种基本减法电路,由于电阻元件配合准确度的偏差而引起的电路共模抑制比(CMRR)的差异。
短句来源
  “减法”译为未确定词的双语例句
    Error Analyzing and Design of A 30 M Sample/s Sampling-holding Circuit and Subtract-gain Circuit
    30兆赫采样频率的采样-保持电路和减法-增益电路的误差分析及设计
短句来源
    This amplifier is used in the sampling-holding and inter-stage subtract-gain circuits of a 10-bit, 30 MHz pipelined A/D converter.
    这种放大器用于 10位分辨率、30MHz采样频率的流水线式A/D转换器的采样 保持和级间减法 增益电路中 .
短句来源
    A Sampling-holding / Subtract-gain Circuit for Analog to Digital Converter
    一种模数转换器的采样保持/增益减法电路设计
短句来源
    The module is implemented by full-differential switch-capacitor circuit.
    MDAC模块具有数模转换、减法、放大和采样/保持功能,该模块采用全差分的开关电容电路来实现;
短句来源
    Two digital image-processing methods are used to eliminate the zero-order spot and conjugate image.
    为了消除重现像中的零级亮斑以及共轭像,采用数字相减法和频谱滤波法对全息图进行了处理。
短句来源
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  subtracting
The sympathetic tone was measured by subtracting the PT contribution from the spectrum power within the range of 0 to 0.2 Hz by means of regression.
      
A method is proposed for improving the signal-to-background ratio by subtracting the matrix element spectra from the total background of the gamma-ray spectrum of the irradiated test sample.
      
Different techniques are proposed for the isolation of the analytical signals from the total voltammetric signal using postelectrolysis and subtracting voltammograms.
      
Different techniques are proposed for the isolation of the analytical signals from the total voltammetric signal using postelectrolysis and subtracting voltammograms.
      
Measurements were performed at 400 nm; the negative peak was obtained by subtracting the absorption spectra of myoglobin (Mb) before and after oxidation.
      
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This paper analyzes the sampling inspection and first order digital loop circuit in rotative velocity detection.It introduces a logic control circuit into the first order digital loop circuit to make the digital character Vs follows frecuency character f_1 closely.A pulse subtraction operated circuit and an automatic conversion feeding circuit are designed. While the coverage factor Dis less than 3, it's proved that the equivalent time constant of the experimental loop circuit can be close to simulated detection.Hence,...

This paper analyzes the sampling inspection and first order digital loop circuit in rotative velocity detection.It introduces a logic control circuit into the first order digital loop circuit to make the digital character Vs follows frecuency character f_1 closely.A pulse subtraction operated circuit and an automatic conversion feeding circuit are designed. While the coverage factor Dis less than 3, it's proved that the equivalent time constant of the experimental loop circuit can be close to simulated detection.Hence, the continuous digital rotative velocity detective device is valuable in practice.

本文分析了采样及一阶数字环路检测转速存在的问题,提出在一阶数字环路中引入逻辑控制电路,可大大加快转速的数字表征量V_s对频率表征量f_1的跟踪。设计了简单可行的脉冲减法运算电路和馈送自动转换电路。通过实验,证明在复盖D<3的范围内,所提实验环路的等效时间常数可接近模拟检测,使数字式转速连续检测装置更为切合实用。

The intensity distribution arisen from holographic subtraction of damped oscillations is analysed. The result proves that the position of node is easily deter minable within holographic subtraction of damped oscillations. Furthermore, it was suggested that two holograms of holograpgic subtraction can be used for measuring the damping factor.

本文对衰减振动全息减法干涉条纹进行了分析。结果表明,全息减法的节线位置容易确定。此外,文中还提出用两张减法全息照片来测定衰减系数。

In this paper, the logic function modification technique is used in the synthesis of modulo-N (N@2n) counters, where N is an arbitrary integer. The design equations for modulo-N up, down and up/down counters with T-type flip-flops are obtained. Based upon it,the method of design modulo-N synchronous up, down and up/down conters using J-K flip-flops is proposed. The design examples show that the fomula-design method has the advantages of being easy to use and fast to design, and is of certain practical significance....

In this paper, the logic function modification technique is used in the synthesis of modulo-N (N@2n) counters, where N is an arbitrary integer. The design equations for modulo-N up, down and up/down counters with T-type flip-flops are obtained. Based upon it,the method of design modulo-N synchronous up, down and up/down conters using J-K flip-flops is proposed. The design examples show that the fomula-design method has the advantages of being easy to use and fast to design, and is of certain practical significance.

本文将逻辑函数修改技术用于任意进制同步计数器的综合,从而导出了任意进制同步加法计数器、减法计数器和可逆计数器使用T型触发器的设计公式。在此基础上提出了使用J-K触发器设计任意进制同步加法计数器、减法计数器和可逆计数器的方法。通过实例表明,公式设计法具有使用方便、设计迅速等优点和一定的实用意义。

 
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