For data conversion card of ARINC429 bus based on DEI1016, the ATMEGA162 was used as the core in it, the data format conversion and data transition between buses was realized by the combination of CPLD chip EPM7128 and AVR single chip ATMEGA162. The interface and operate mode of DEI1016 was set by ATMEGA162 program;
Performance and classification of on chip bus are also discussed. AMBA which is a hierarchical bus protocol includes four different buses as ASB (Advanced System Bus), AHB (Advanced High-Performance Bus), APB (Advanced Peripheral Bus) and AXI (Advanced extensible Interface).
AMBA协议为多层总线结构,目前包括四种不同的总线ASB(Advanced System Bus)、AHB(Advanced High-Performance Bus)、APB(Advanced Peripheral Bus)、AXI(Advanced eXtensible Interface)。
When designing data storage transmission modular, we carry out the foundation of the understanding in-depth for the PCI agreement of bus line, have put forward the data storage transmission scheme based on the PCI9054 controller, FIFO data memory and CPLD.
An adjacent table-based simplified model of distribution networks containing medium voltage buses of a substation is established.
We study the basic behaviors of buses using bus route models (BRM) by introducing a special kind of noise induced by impacts of other vehicles.
The peak where the maximum velocity of buses exists shrinks in low noise conditions, which is worth the further study.
Furthermore, we extend the model to take into consideration more realistic and important parameters, such as the number of passengers, the capacity of buses, and the possibility of overtaking, for performing simulations of the first loop.
Suggestions on the choice of the number of buses and the maximum velocity are provided for the practical operation.
A block diagram and basic segments of the program are described: a harmonic signal is converted into a 10-bit digital code and outputted to the data bus.
By employing a conventional PC (Pentium 1 GHz, 200-MHz data bus), the calculation time of the plasma column parameters at one instant in time does not exceed 3 ms, which offers the possibility of controlling the plasma parameters during a discharge.
The low-level control system of the robot incorporates 14 embedded mini-circuit boards implementing a low number of wires and highspeed, I2C data bus technology.
In this machine, the data bus interconnecting control units and processing elements is partitioned in order to decrease the hardware cost of the interconnection.
In the current implementation, a 2.25 MHz intermediate frequency (IF) is bandpass sampled at 1 μs intervals and these samples are multicast over a high-speed Ethernet which serves as a raw data bus.
The basic idea is to use ZVS circuit as the main circuit of inverter resonance at the beginning of every carrier period so that each power device can com-mutate when voltage of the main circuit's DC bus line is zero.
Thus B3 BS (lines 211 and 215), B14Bus (line 217), and B15BS (lines 212, 213, 216, and 218) all had fewer affected individuals than BSBS homozygotes from the same families.
PRCM branches off a desired channel from the spatial multiplexed optical bus line by appropriate setting of the control beam pattern.
The architecture makes use of a single bus line to provide error indication.
The purpose of this paper is to describe the development of a model designed to predict changes to ridership resulting from small changes in the service provided by a given bus line.