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cic滤波器
相关语句
  cic filter
     Implementation of CIC Filter Based on FPGA
     基于FPGA的CIC滤波器实现
短句来源
     Study on the Algorithm of CIC Filter and the FPGA Implementation
     Hogenauer CIC滤波器算法研究及FPGA设计实现
短句来源
     Using canonic signed digit (CSD) , a 16-bit decimator consisting of CIC filter and half-band filter is designed.
     采用CSD码,用CIC滤波器、半带滤波器,实现了16位△-∑A/D转换器中的抽取器。
短句来源
     Improved Performance of CIC Filter in Software Define Radio
     软件无线电中CIC滤波器的性能改进
短句来源
     Through the cascade of CIC filter, HB filter and FIR filters, the data frequency is cut down.
     采用CIC滤波器、HB滤波器、FIR滤波器三级级联的方式来降低采样率。
短句来源
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  “cic滤波器”译为未确定词的双语例句
     A Design and Simulation of Sharpened-CIC Filter
     一种Sharpened-CIC滤波器的设计及仿真
短句来源
     3. Design multi-stage decimation system on the basis of Halfband filters and CIC filters.
     3.在半波带滤波器和CIC滤波器的基础上设计了多级抽取系统。
短句来源
     Firstly, the basic theory of digital up/down conversion is introduced, and then, the available structures of Cascaded Integrator Comb (CIC), which includes the traditional CIC, Sharpen CIC (SCIC) and CIC+ISOP (Interpolated Second-Order Polynomial), are compared.
     文中首先介绍了数字上下变频的基本理论; 然后比较了目前已有的各种多级抽取/内插滤波器:CIC原型滤波器、Sharpen CIC滤波器以及CIC+ISOP(Interpolated Second-Order Polynomial)滤波器;
短句来源
     The emphasis of research is decimation technology. Design CIC filters and Halfband filters with this theroy.
     重点研究了抽取技术,并将这种技术应用于数字中频系统,设计了CIC滤波器和半带滤波器;
短句来源
     2. Apply truncation theory and design multi-stage CIC filters with higher efficiency.
     2.应用剪除理论实现多级CIC滤波器,进一步提高了硬件效率和运行速度;
短句来源
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  相似匹配句对
     The Realization of Cascaded Integrator Comb Filter With FPGA
     CIC滤波器的原理及FPGA实现
短句来源
     Implementation of CIC Filter Based on FPGA
     基于FPGA的CIC滤波器实现
短句来源
     Filter in hydraulics
     液压滤波器
短句来源
     Decentralized Filter
     分散滤波器
短句来源
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  cic filter
CIC filter theory in DDC and implementation by using FPGA
      
Cascade Integrator Comb(CIC) filter is the main part of the next generation High Frequency (HF) radar.
      
Because we can adjust the parameters freely according to our need, the CIC filter can be adapted to the next generation HF radar.
      
A desirable characteristic of the CIC filter in the contest VLSI design is of course that it is multiplier free.
      
A desirable characteristic of the CIC filter in the contest VLSI design is, of course, that it is multiplier-free.
      
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The main purpose of this paper is to analyze the efficient algorithm of DDC, so that the DDC process can be implemented in software on general purpose DSP and can afford greater flexibility. Combining mixing with decimating and filting can greatly reduce the amount of operations. A decimation filter for DDC is proposed and proved to be effective by simulation. The proposed decimation filter is a cascade of a CIC filter, an ISOP(Interpolated second-order polynomials), and an FIR filter.

本文讨论了软件无线电接收机中数字下变频处理的高效算法和结构 ,其目的是在DSP中用软件完成数字下变频处理 ,这样可省去专用数字下变频器 (DDC)硬件集成电路 ,并增强中频处理的灵活性、适应性。文中指出将混频、抽取、滤波结合在一起完成将大大减少运算量 ,并分析了将CIC滤波器与内插的二阶多项式滤波器组合进行有效抽取滤波的设计方案 ,仿真结果表明该方案有效可行

One Feasibility of Software Radio is that there is no restriction regardi ng bandwidth,selec-tivity,frequency range and modulation schemes.Hence,the conversion b etween different sample rates is a critical important functionality of a Software Radio receiver.Realiz ed digitally,sample -rate conversion is conventionally regarded as interpolation.It will be shown that interpolation does not fulfill the anti -aliasing requirement.A modified CIC -filter(cascaded -integrator -comb )for sample rate conversion(SRC)is...

One Feasibility of Software Radio is that there is no restriction regardi ng bandwidth,selec-tivity,frequency range and modulation schemes.Hence,the conversion b etween different sample rates is a critical important functionality of a Software Radio receiver.Realiz ed digitally,sample -rate conversion is conventionally regarded as interpolation.It will be shown that interpolation does not fulfill the anti -aliasing requirement.A modified CIC -filter(cascaded -integrator -comb )for sample rate conversion(SRC)is presented in this article,which can compress aliasing effectively.

软件无线电接收机的灵活性之一是在于对调制方式没有限制。为此,不同采样率之间的转换对软件无线电终端来说就显得尤为重要。实现数字的采样率转换在传统方法中就是利用插值,而一般的传统方法不能满足反混叠效应的要求。给出了在采样率转换(SRC)中的一种改进级联积分梳齿(CIC)滤波器,从而更有效地避免了混叠效应。

Software Radio has become the focus of research in Communications. Digital IF, one of its key technologies, is typical application of multi-rate signal processing theory. This paper studies high decimation ratio of digital downconverter given narrow-band signal, and especially analyze mul?stage decimation algorithm based on CIC filter and HB filter. By comparison, the optimal design can save 98.8% of the logic resources than that of single stage polyphase design, and can be well implemented in a single FPGA...

Software Radio has become the focus of research in Communications. Digital IF, one of its key technologies, is typical application of multi-rate signal processing theory. This paper studies high decimation ratio of digital downconverter given narrow-band signal, and especially analyze mul?stage decimation algorithm based on CIC filter and HB filter. By comparison, the optimal design can save 98.8% of the logic resources than that of single stage polyphase design, and can be well implemented in a single FPGA chip. Furthermore, the filtering performance is better than design requirements.

软件无线电是目前通信领域研究的热点,其关键技术之一数字中频技术是多速率信号处理理论的典型应用。本文研究了窄带信号条件下,高倍抽取的数字下变频设计,重点分析了基于CIC滤波器和HB滤波器的多级抽取算法。经比较,该设计比单级多相抽取设计节省98.8%的资源,完全可在单片FPGA内实现,而且,滤波性能优于设计指标要求。

 
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