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电感提取
相关语句
  inductance extraction
     2) A new inductance extraction method is presented based on the Newton-BP neural networks.
     2) 提出一类基于牛顿法BP网络的互连线寄生电感提取方法;
短句来源
     Research on inductance extraction for on-chip interconnects in DSM designs
     超深亚微米芯片互连线电感提取技术及应用
短句来源
     An Approach to Solving the Linear Systems with Multiple Right-Hand Sides in 3-D Parasitic Inductance Extraction
     三维寄生电感提取中一种多右端方程求解方法
短句来源
     Frequency Dependent Inductance Extraction and Equivalent Circuit Model of Lossy Interconnect Lines
     有耗互连线频变电感提取及等效电路模型
短句来源
     In this tutorial paper we reviewed recent developments in inductance extraction for on-chip interconnects, and discussed some resulting analysis and verification problems.
     本文阐述了VLSI片上互连线电感提取技术现状及发展方向,对各类提取方法作了扼要比较;
短句来源
  “电感提取”译为未确定词的双语例句
     According to the principle of similarity,the excitation current of CT is drawn with the similar transducer,which,through some electronic circuits,turns into proper compensation current and is injected into the compensation winding.
     根据相似原理 ,用相似电感提取 CT的励磁电流 ,经过一些电子线路 ,产生适当的补偿电流 ,注入补偿绕组。
短句来源
     Parasitic Inductance Modeling for On-chip Interconnects Based on IC Analysis on Inductive Effects
     VLSI片上互连线电感提取技术及考虑电感效应的互连分析
短句来源
     The theory basic of this paper is the induction of extracting exciting current and theinduction of self-adaptive gain module.
     本文的理论基础是:相似电感提取励磁电流的推导,及变增益自适应模型的推导。
短句来源
     In this method, the similar inductance is used to extract the excitation current of CT,which, through some electronic circuits, turns into proper compensation current and isinjected into the compensation winding. This current replaces the exciting current, sothe error is reduced.
     本文的实现方法是采用具有与电流互感器铁芯相似磁特性的铁芯制成的电感提取电流互感器的励磁电流,将该励磁电流经过一些电子电路的处理,产生补偿电流,注入补偿绕组,从而减小电流互感器的误差。
短句来源
     Some problems that occurred in IC analysis, such as sparsity and stability, model order reduction are first discussed.
     首先回顾了典型电感提取方法及实际应用中电感阵稀疏化、模型降阶等问题;
短句来源
  相似匹配句对
     S. tenebrarius H6 total DNA was extracted and incomplete digested with Sau3A I .
     提取S.
短句来源
     Parameters Extraction Methods of an RF Spiral Inductor
     RF螺旋电感参数的提取方法
短句来源
     A 3-D Fast Inductance and Resistance Extractor for Interconnects
     三维互连电感电阻的快速提取
短句来源
     Text Extraction in Video
     视频文本的提取
短句来源
     LOW LOSS SIMULATED INDUCTOR
     低耗模拟电感
短句来源
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  inductance extraction
Most of the previous works on inductance extraction are field-solvers, which are intrinsically more accurate but computationally expensive.
      
To model the inductive effects of intermediate buses a fast automated inductance extraction and verification tool will be necessary.
      
This results in a high complexity of inductance extraction and simulation.
      
The problem faced here by the block-diagonal method is common to most of the existing algorithms in on-chip inductance extraction.
      


Cooperating with shift window method used to search interaction areas, a quick on chip parasitic inductance extractor based on neural networks, which has good memory and the capability of self learning, is presented Simulation results show that this method can estimate inductances quickly and efficiently, and may be used as a good guidance for designing and analyzing VLSI interconnects

通过将具有自学习能力和记忆功能的神经网络应用于平行导体间的电感计算 ,结合移动窗口方法搜索作用域 ,实现片上互连寄生电感参数提取。仿真例子表明 ,此方法能够快速、有效地实现电感提取 ,可作为 VLSI互连线性能分析、设计的有效向导

Circuits with increasingly higher speed are being integrated at higher density under very deep sub micron (VDSM) technologies. The strong electromagnetic coupling existing widely among onchip interconnects can no longer be ignored. Some problems that occurred in IC analysis, such as sparsity and stability, model order reduction are first discussed. Research on simultaneous switching noise analysis in power supply trees, concept of RL ladder circuit and effective capacitance are then presented. Some simulation...

Circuits with increasingly higher speed are being integrated at higher density under very deep sub micron (VDSM) technologies. The strong electromagnetic coupling existing widely among onchip interconnects can no longer be ignored. Some problems that occurred in IC analysis, such as sparsity and stability, model order reduction are first discussed. Research on simultaneous switching noise analysis in power supply trees, concept of RL ladder circuit and effective capacitance are then presented. Some simulation results showed that the inductive effects influence greatly some VLSI key interconnect, and comprise important limitation on the signal integrity.

超深亚微米(VDSM)工艺下,集成电路的高频、高集成度趋势使互连线间电磁耦合作用不容忽略.首先回顾了典型电感提取方法及实际应用中电感阵稀疏化、模型降阶等问题;基于互连线分布RLC模型,对一类电源树的同步切换噪声问题作了分析;并介绍了RL梯状电路、有效电容法等实用电感效应处理措施.一些仿真实例表明,未来高频集成电路中电感效应可严重影响部分关键互连线网性能,将成为信号完整性的重要制约因素.

Since VDSM designs tend to be much faster and denser, inductive effects is of VLSI interconnects are becoming more and more important. While parasitic inductance is taken into account, most IC design and verification methodologies are significantly complicated. In this tutorial paper we reviewed recent developments in inductance extraction for on-chip interconnects, and discussed some resulting analysis and verification problems. A subset of recent results for partially addressing the challenge was presented....

Since VDSM designs tend to be much faster and denser, inductive effects is of VLSI interconnects are becoming more and more important. While parasitic inductance is taken into account, most IC design and verification methodologies are significantly complicated. In this tutorial paper we reviewed recent developments in inductance extraction for on-chip interconnects, and discussed some resulting analysis and verification problems. A subset of recent results for partially addressing the challenge was presented. We hope that the paper will be a good guidance for VLSI design, analysis and verification.

VDSM工艺下,芯片的高速、高集成度趋势使电磁耦合作用不容忽略;而电感效应的引入使VLSI设计和验证变得复杂。本文阐述了VLSI片上互连线电感提取技术现状及发展方向,对各类提取方法作了扼要比较;同时探讨了互连分析中包含电感效应时存在的部分问题和解决办法,以期作为提高VLSI设计、分析和验证效率的有效向导。

 
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