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静电保护
相关语句
  esd protection
     SCR Devices in ESD Protection Circuits for CMOS IC's
     SCR器件在CMOS静电保护电路中的应用
短句来源
     Research of Mixed-Voltage I/O ESD Protection Mechanism Implemented by Substrate-Triggered Technique
     衬底触发层叠式NMOS实现混合I/O静电保护机制研究
短句来源
     Application of Low-Voltage Triggered Silicon Controlled Rectifier in ESD Protection Circuits
     低压触发可控硅结构在静电保护电路中的应用
短句来源
     In recent years,SCR devices are widely used in CMOS IC's for ESD protection.
     针对近年来SCR器件更加广泛地被采用到CMOS静电保护电路中的情况,文章总结了SCR保护电路发展过程中各种电路的工作机理。
短句来源
  “静电保护”译为未确定词的双语例句
     Parallel Port Terminal Network With ESD Protect
     具有防静电保护的并行端口终端网络
短句来源
     ESD Circuits Design for High-Speed Analog CMOS Integrated Circuits
     高速CMOS模拟集成电路中的静电保护电路设计
短句来源
     Application of SCR Device in Deep Sub-micron COMS ESD Protect circuit
     SCR器件在深亚微米CMOS静电保护电路中的应用
短句来源
     Then, It introduces the details of the design from six aspects, including cells dividing, analysis of stability, and design of matching network, design of bias network, design of main amplifier and design of ESD.
     随后分别从六方面,即模块划分、稳定性分析、匹配网络设计、直流偏置设计、主放大电路设计以及静电保护电路设计来具体讲述功率放大器的电路设计细节,给出了电路各个模块的电路示意图和最终电路的结构图。
短句来源
     Introduce the function of I/O buffers of all CMOS sorts, design for circuits and layout design of I/O buffer with considering some kinds of effect, and take the ESD problem to be discussed.
     文章详细介绍了基于CMOS的芯片I/O缓冲电路分类,功能,电路及版图设计的一些考虑以及芯片引脚的静电保护问题。
短句来源
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  相似匹配句对
     The Protection of Electrostatic Discharge of Integrated Circuit
     集成电路的静电放电保护
短句来源
     STUDIES ON ANTI-CORROSION MECHANISM OF LOW-VOLTAGE ELECTROSTATIC CATHODIC PROTECTION
     低压静电阴极保护缓蚀机理的研究
短句来源
     The Protection of Thrust Bearing Shoe
     推力瓦的保护
短句来源
     ELECTROSTATIC GYRO-KLYSTRON
     静电回旋速调管
短句来源
     Protection of Possession
     占有的保护
短句来源
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  esd protection
The electrostatic discharge (ESD) protection circuits function to limit RF voltage to a safe level.
      
A robust polysilicon-assisted SCR in ESD protection application
      
The circuit has ESD protection and utilizes internal termination with a single external impedance reference and thereby facilitates ease of use and higher package density.
      
Design and Analysis of On-Chip ESD Protection Circuit with Very Low Input Capacitance for High-Precision Analog Applications
      
An ESD protection design is proposed to solve the ESD protection challenge to the analog pins for high-frequency or current-mode applications.
      
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The reliability and the ability of anti irradiation of CCD is concerned in the lifetime of CCD camera.The drive method and the restrain method of output DC level are concerned in whether or not the capacity of CCD is made well.In this paper use the data acquired from the speeding up lifetime test,estimating the reliability of CCD,analyzing the influence of high energy irradiation on CCD device.On the other hand,analyse the analogy and digital drive,compare the two methods of restraining output DC level and...

The reliability and the ability of anti irradiation of CCD is concerned in the lifetime of CCD camera.The drive method and the restrain method of output DC level are concerned in whether or not the capacity of CCD is made well.In this paper use the data acquired from the speeding up lifetime test,estimating the reliability of CCD,analyzing the influence of high energy irradiation on CCD device.On the other hand,analyse the analogy and digital drive,compare the two methods of restraining output DC level and raise an anti electrostatic method.

CCD器件的可靠度及耐辐照能力关系到CCD相机的工作寿命;CCD器件的驱动方式及输出直流电平的抑制方法关系到是否充分发挥了CCD器件的潜力;静电保护关系到CCD器件自身的安全。利用加速寿命试验中获得的数据,通过分析,预估出CCD器件的可靠度;分析了高能辐射对CCD器件的影响;对模拟及数字驱动进行了分析并指出注意事项;比较了两种常见的抑制CCD输出直流电平的方法,提出了应用过程中防静电措施。

The low voltage triggered silicon controlled rectifier (LVTSCR) in deep submicron IC is a very effective ESD protection device. The structural parameter, such as channel length of MOSFET, distance between pn diffusion, and gate connection structure, are proved to have effect on the ESD performance of LVTSCR structure An ESD failure voltage above 6000 V is obtained by optimizing the LVTSCR structure.

 对LVTSCR(LowVoltageTriggeredSiliconControlledRectifier)结构在深亚微米集成电路中的抗静电特性进行了研究。实验结果表明,LVTSCR结构的参数,如NMOS管沟道长度、P-N扩散区间距和栅极连接方式等,都对LVTSCR结构的静电保护性能有影响。利用优化的LVTSCR结构,获得了6000V以上的ESD失效电压。

Electrostatic discharge is considered a serious threat to CMOS IC's.With the scaling down of CMOS technology,the demand for ESD protection has become stronger than ever before.In recent years,SCR devices are widely used in CMOS IC's for ESD protection.ESD protection circuits using SCR devices are reviewed in the paper,to provide IC designers with a reference in dealing with ESD protection design for CMOS integrated circuits.

 静电放电(ESD)对CMOS电路的可靠性构成了很大威胁。随着CMOS电路集成度的不断提高,其对ESD保护的要求也更加严格。针对近年来SCR器件更加广泛地被采用到CMOS静电保护电路中的情况,文章总结了SCR保护电路发展过程中各种电路的工作机理。旨在为集成电路设计人员提供ESD保护方面的设计思路以及努力方向。

 
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