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无线电电子学
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层次电路     
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  hierarchical circuits
     To address the problem of low accuracy of timing characterization caused by the large scale of VLSI circuits,a new timing characterization method to improve the accuracy of timing models in hierarchical circuits is proposed. The concepts of the local false path and global false path are introduced to the method.
     针对VLSI电路规模增大引起的时序特性确定方法精确度低的问题,研究了一种将局部伪路径和全局伪路径的概念引入到改进层次电路时钟模型准确性的新的时序特性分析方法。
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  level circuit
     The optimization and asynchronous design of sequencing circuits and high level circuit design and optimizing techniques are described in particular.
     重点介绍了时序电路的优化、异步设计、高层次电路设计和优化技术。
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  “层次电路”译为未确定词的双语例句
     Beause WGLs can't present the circuits' descriptions which contain Boolen variables and word level variables ,this paper presents a new model LWGLs (Labeled and Weighted Generalized Lists) basing on WGLs.
     由于WGLs不能应用于含有布尔变量和字级变量电路描述的表示,所以给出一个基于WGLs的新模型LWGLs(Labeled and Weighted Generalized Lists)。 LWGLs可以应用于含有布尔变量和字级变量电路描述的表示,并应用于高层次电路描述与电路实现或不同的电路实现之间的等价性验证。
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  相似匹配句对
     Basic Direct Current Circuits
     直流电路
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     the hierarchy reasoning process;
     层次推理;
短句来源
     three levels;
     三层次;
短句来源
     Digital ICs
     数字电路
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     Hierarchical Analog Cireuit Fault Diagnosis Base on Clustering
     基于聚类的层次型模拟电路故障诊断
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  layer circuit
Based on the fabrication process of these six-Nb-layer circuit structures, we have been developing a next generation standard process for our foundry.
      
Hole smears prevent contact with plated through holes on multi-layer circuit boards.
      
In our simulation experiments using six-layer circuit with randomly chosen input currents we always received a correct selection.
      
Two major advantages are realized by upgrading from a two layer circuit board to a four layer board.
      
The board is developed in Brorfelde on a 6-layer circuit board using power and ground planes to limit uProcessor noise.
      
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  hierarchical circuits
MODET hasbeen tested against a number of hierarchical circuits with impressivespeedups in relation to gate-level test generation.
      
  level circuit
It was shown that any ?-level circuit based on the multivalued components is representable as an algebraic model based on ? linear arithmetic polynomials mapped correspondingly into ? decision diagrams that are linear and planar by nature.
      
The overall circuit functionality is then verified by composing the component functions and comparing the result to the word-level circuit specification.
      
The procedure begins with a SPICE level circuit description and generates a model consisting of linear and nonlinear differential equations.
      
This new tuning technique features digital tuning, compact size, and wide tuning range as well as high linearity as demonstrated by transistor-level circuit simulations.
      
elegans with defective synaptic GABA and acetylcholine transmission, defective muscle calcium signaling, and defective muscles and cuticle structures, and compared the data with our systems level circuit model.
      
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Sheet circuits design becomes more and more important with the development of complicated functional electronic systems. As a means of designing complicated sheet circuits, a research on the design of sheet circuits using Protel 98 has been done by the authors.

随着电子系统的功能化、复杂化 ,层次电路的设计显得非常重要。基于此 ,本文研究运用 Protel98对复杂层次电路的设计 ,依此探索出一种设计复杂层次电路的手段和方法

The basic concept and development process of EDA techniques are explained firstly in this paper;then,the basic characteristics and tools of EDA techniques are introduced. Based on two different administrative levels (electric circuit grade design and system grade design)the flowchart is analysed emphatically; a method of Top-Down for advanced electric design is interpreted.

阐述了EDA技术的基本概念和发展过程 ,介绍了EDA技术的基本特征和基本工具 ,着重分析了EDA技术在两个不同层次 (电路级设计和系统级设计 )上的工作流程 ,阐明了一种自顶向下的高层次电子设计方法 .

It is discussed that a few functions which are often ignored or mistaken, but very useful through several examples. First , the method of performance analysis and the procedure of realization are introduced in Probe ; and then it is illustrated that the places which is usually made mistakes and the questions which should be pay attention to edition in the foundation of branch circuit, layer circuit and model; finally, we discuss about the building of Pspice mathematical macro model.

通过几个例子讨论了Pspice设计中容易被忽视、或出错,但非常有用的一些功能.介绍了用Probe进行性能分析的方法及实现过程;叙述了子电路、层次电路、模型在创建中容易出错和应该注意的问题;最后对Pspice数学宏模型的建立展开了讨论.

 
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