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测试时序
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  “测试时序”译为未确定词的双语例句
     Emphasizing on the software design, this dissertationexpatiates on the thinking thread of designing the main control software of ATE8000,including: how to design the software structure; how to divide the programming; howto schedule the test, how to design the user interface;
     以软件设计为重点,本文详细介绍了ATE8000综合测试台测试主控软件的设计思路,包括结构设计、模块划分、测试时序设计、用户界面设计、通信接口设计以及各模块的设计。
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     The internal logic design of FPGA had been completed,and the logic function had been simulated and verified.
     应用自顶向下的设计思想,完成了FPGA内部的逻辑设计,并对其逻辑功能进行了仿真验证,给出了FPGA数据采集时的测试时序图。
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  相似匹配句对
     STATISTICAL TESTING FOR SEQUENTIAL CIRCUITS
     时序线路的统计测试
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     Test
     测试
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     TIMING\|SEQUENCE TEST OF PARALLEL PROGRAMS
     并行程序的时序测试
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     In Test
     iM测试
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  test sequence
Generation method of minimal-complete-coverage interoperability test sequence based on digraph
      
By using minimal-complete-coverage criterion, the test sequence generation based on digraph can produce more effective test sequences.
      
A novel method that records the test sequence dynamically is proposed.
      
It is shown that a universal test sequence from the n + 1 set enables detecting all single faults in the circuit.
      
Test Sequence Construction Using Minimum Information on the Tested System
      
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The statistical testing presented in this paper is an improved compact testing method for sequential circuits. The method tests circuits using 'acceptance region'. The background for the theory on 'acceptance region' and practical computational method are given in this paper.

本文提出的统计测试是时序线路压缩测试的一种新方案,它利用正常线路在随机输入下的统计特征即“接收区”检查待测线路是否存在故障.叙述了接收区概念的理论背景和计算方法.

ln two experiments, memory for temporal order and item was tested by list identification and free recall. Subjects received five lists containing 50 Chinese two- character words from ten categories, each of which included five items. The structure of the lists separated all the items into two types: Same - category words within the list and across lists. The results are as follows: (l) When measure was delayed 2、6 and l0 seconds, temporal order memory for the same - category word within the list was better than...

ln two experiments, memory for temporal order and item was tested by list identification and free recall. Subjects received five lists containing 50 Chinese two- character words from ten categories, each of which included five items. The structure of the lists separated all the items into two types: Same - category words within the list and across lists. The results are as follows: (l) When measure was delayed 2、6 and l0 seconds, temporal order memory for the same - category word within the list was better than across lists; only when the measure was delayed 2 seconds, item memory had an advantage for the same - category words within the list (2) The advantage of item memory for the same - category words within the list existed in recall cued by categories, not by the lists. (3) There are effects of the serial - list position on two types of memory.

该项研究探讨系列范畴词表的时序长时记忆和项目长时记忆,实验设计的系列范畴词表将记忆项目分为词表内范畸相同项和词表间范畴相同项,时序记忆测量方法是词表辨认,项目记忆测量方法是自由回忆。实验一发现:2分钟延缓测试词表内范畴相同项时序记忆和项目记忆优于词表间范畴相同项;6分钟以及10分钟延缓测试时序记忆仍是词表内范畴相同项好。实验二发现:以范畴线索提取,两类项目记忆没有显著差异;以词表线索提取,两类项目记忆差异显著。实验结果提示:2分钟延缓测试的提取策略是词表线索,6分钟以及10分钟延缓测试的提取策略是范畸线索。

Application of scanning method in the design for testability (DFT) of digital system is described in the paper Problems with DFT, such as the basic scanning structure and test sequence,are discussed In scanning method, strict regulations are imposed on the original circuit structure of the chip Restrictions of the scanning structure on the circuit structures and revision of a circuit to conform to the regulations are discussed in particular

探讨了在 Synopsys软件中用全扫描结构实现数字电路可测性设计中遇到的问题及解决方法 ,如扫描结构的基本结构、测试的时序等问题。扫描结构对电路本身的结构有严格的要求 ,重点讨论了扫描结构对电路结构的限制及对违反限制的电路进行修改的方法

 
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