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体硅cmos
相关语句
  bulk-silicon cmos
     Optimum Design of High-temperature Bulk-silicon CMOS Inverter in Wide Temperature Range
     宽温区高温体硅CMOS倒相器的优化设计
短句来源
     This paper puts fo rward full consideration of design of th e structure parameter of high-temperatur e bulk-silicon CMOS inverter and brings about the results of optimum design of high-temperature bulk-silicon CMOS inver ter in wide temperature range(27~250 ℃), on the basis of comprehensive research of the high-temperature models of DC cha racteristic and transient characteristi c of bulk-silicon CMOS inverter.
     在对体硅 CMOS倒相器直流特性、瞬态特性的高温模型和高温特性深入研究的基础上 ,提出了高温体硅 CMOS倒相器结构参数设计的考虑 ,给出了宽温区 (2 7~ 2 5 0℃ )体硅 CMOS倒相器优化设计的结果。
短句来源
  bulk silicon cmos
     Bulk Silicon CMOS FinFET's Structure and Characteristics
     体硅CMOS FinFET结构与特性研究
短句来源
     High Q-Factor On-chip Spiral Inductors for Bulk Silicon CMOS RF IC's
     体硅CMOS射频集成电路中高Q值在片集成电感的实现
短句来源
     It is quite difficult to fabricate onchip high Qfactor spiral inductors in bulk silicon CMOS RF IC's This paper discusses some conventional techniques to improve the Qfactor of onchip spiral inductors Those methods are all compatible with CMOS technology
     制作高Q值在片集成电感一直是体硅CMOS射频集成电路工艺中的一大难点,文章讨论和分析了体硅RFIC工艺中提高在片集成电感Q值的几种常用方法,这些方法都与CMOS工艺兼容。
短句来源
  bulk cmos
     Increase of Transient Radiation Hardness of Bulk CMOS Devices with Neutron Radiation
     用中子辐照提高体硅CMOS器件的抗瞬时辐照能力
短句来源
     Numerical Simulation For Parasitic parameters in Bulk CMOS and Test Analysis of Its Latch-up Resistibility
     体硅CMOS寄生参数的数值模拟及抗闩锁能力的测试分析
短句来源
     The parasitic pnpn structure exists inherently in bulk CMOS IC. It leads devices to Latch-up failures under certain conditions.
     体硅CMOS IC内不可避免地存在着寄生pnpn四层结构,在一定条件下,导致器件闭锁失效.
短句来源
     The parasitic pnpn structure exists inherently in bulk CMOS IC. It leads devices to Latch-up failures under certain conditions.
     体硅 CMOS IC 内不可避免地存在着寄生 pnpn 四层结构,在一定条件下,导致器件闭锁失效。
短句来源
  “体硅cmos”译为未确定词的双语例句
     To introduce the structure and features of SOI transistors and to compare SI-CMOS circuits with SOI-CMOS circuits in terms of processing and Layout-design.
     本文介绍了 SOI晶体管的结构和特点 ,并对体硅 CMOS电路和 SOI CMOS电路在工艺及版图设计上进行了比较。
短句来源
     Tests of total dose effects have been performed on the China-manufactured bulk Si MSI CMOS ICs irradiated by Co60 gamma-ray and 1.5MeV electron.
     本文报道了国产中规模体硅CMOS电路在~(60)Coγ射线和1.5MeV电子辐照下的总剂量效应的研究结果。
短句来源
     CMOS Latch-up and Buried well Technology
     体硅 CMOS 的闩锁效应和无闩锁的埋阱 CMOS 技术
短句来源
     Both nMOS and pMOS transistors with two-edged and multi-finger layouts are fabricated in a standard commercial 0.6μm CMOS/bulk process to study their total ionizing dose (TID) radiation effects.
     在商用标准0·6μm体硅CMOS工艺下,设计了采用普通单栅及多栅版图结构的nMOS和pMOS晶体管作为测试样品,讨论其经过γ射线照射后的总剂量辐照特性.
短句来源
     A new method of preventing bulk-Si CMOS devices from latchup
     抑制体硅CMOS器件闭锁的新方法
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  bulk cmos
The T/R switch is implemented in a 0.35 μm bulk CMOS process and it occupies 150 μm · 170 μm of die area.
      
The whole chip was laid out and fabricated in a 0.35?μm bulk CMOS technology.
      
This work presents a simple analytical model for the low frequency noise in ultrathin oxide MOSFETs of advanced bulk CMOS technology.
      
In a dynamic CMOS circuit implementation using 0.225 μm bulk CMOS technology, 11.7% speed improvement is observed with 8.1% less power consumption for the reduction tree.
      
Under dose rate conditions, transient upset, latch-up and photocurrent are reported with latch-up immunity reported for the bipolar 2 process and simultaneous latch-up and transient upset reported for both the bulk CMOS and BiCMOS processes.
      
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CMOS/SOI devices are fabricated on Ar+ laser recrystallized polysilicon islands on SiO2 isolating layers. Both N-channel and P-channel MOSFET exhibit good output characteristics. The low field electron and hole mobilities of MOSFET with a channel length of 4 μm are 510cm2/V.s and 142cm2/V.s respectively. 6-stage CMOS inverters have fine static and transient characteristics. 9-stage CMOS ring oscillators with P-channel transistors of (W/L) = (112μm/6μm) and N-channel transistors of (W/L) = (52μm/6μm) are fabricated....

CMOS/SOI devices are fabricated on Ar+ laser recrystallized polysilicon islands on SiO2 isolating layers. Both N-channel and P-channel MOSFET exhibit good output characteristics. The low field electron and hole mobilities of MOSFET with a channel length of 4 μm are 510cm2/V.s and 142cm2/V.s respectively. 6-stage CMOS inverters have fine static and transient characteristics. 9-stage CMOS ring oscillators with P-channel transistors of (W/L) = (112μm/6μm) and N-channel transistors of (W/L) = (52μm/6μm) are fabricated. The minimum propagation delay is 2.8ns/stage, and the minimum power delay product is 2.6pJ/stage. These speed performance of CMOS/SOI devices are superior to those of the same CMOS devices fabricated on bulk silicon.

在Ar~+激光再结晶多晶硅岛上制备出的CMOS/SOI器件,性能良好。N沟和P沟MOSFE7在沟道长度为4μm时,低场电子和空穴表面迁移串分别为510cm~2/V.s和142cm~2/V.s;CMOS六倒相器有好的静态和瞬态特性;CMOS九级环形振荡器P沟负载管和N沟输入管的W/L分别为112μm/6μm和52μm/6μm,其最小传输延时为2.8ns/级,最小延迟功耗乘积为2.6pJ/级。速度性能优于同尺寸的体硅CMOS器件。

Tests of total dose effects have been performed on the China-manufactured bulk Si MSI CMOS ICs irradiated by Co60 gamma-ray and 1.5MeV electron.It has shown that the soft failure of these devices usually occured at 400Gy (Si), which is nearly independent of the bias voltage during irradiation,and the logic function fails above 1000Gy(Si). Some parameters of the soft failure, however,is dependent upon the bias voltage during irradiation and different manufacturing technologies.

本文报道了国产中规模体硅CMOS电路在~(60)Coγ射线和1.5MeV电子辐照下的总剂量效应的研究结果。试验表明,器件的软失效(参数退化达到某一损伤阈值)通常在400Gy(Si),而逻辑功能的失效则发生在1000Gy(Si)以后。同时,器件的软失效与辐照偏置条件没有明显的依赖关系,但软失效的参数却依赖于偏置条件及各厂家MOS工艺的差异。

Using an all ion-implantation low temperature process, small scale CMOS/SOS ICs of high performance were fabricated. These circuits accord with corresponding CD4000 series of bulk CMOS in electrical parameters, with gamma total dose radiation hardness up to 1 ×107 rad (Si) and gamma transient dose radiation hardness over 5 × 1010 rad (Si)/sec. This paper briefly describes the basic considerations for improving radiation hardness and gives the results of radiation tests.

本工作采用先进的全离子注入低温工艺,研制成八个高水平4000系列小规模CMOS/SOS集成电路品种,它们是SC_(4001)、SC_(4002)、SC_(4011)、SC_(4012)、SC_(4013)、SC_(4030)、SC_(4066)及SC_(4069)。这些电路除了电学参数满足相应体硅CMOS电路以外,还具有优良的抗辐照特性,其抗γ总剂量达1×10~7rad(Si),抗γ瞬态剂量率达5×10~(10)rad(Si)/s以上。 本文简要介绍CMOS/SOS器件抗γ总剂量辐照及抗γ瞬态辐照的基本考虑以及辐照实验的结果。

 
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