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sram控制器
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  sram controller
     Design of QDR SRAM Controller and Realization of FPGA
     QDR SRAM控制器的设计与FPGA实现
短句来源
     FPGA realization of SRAM controller in videoimage capture system
     视频图像捕获系统SRAM控制器的FPGA实现
短句来源
     Design of a ZBT SRAM Controller for a High Speed Remote Sensing Image Compression System
     高速遥感图像压缩系统ZBT SRAM控制器的设计
短句来源
     Assertion Based on Functional Verification of SRAM Controller
     基于断言的SRAM控制器功能验证
短句来源
     The rate of capturing image data is 13.5MHz. The data isreceived firstly by SRAM controller which is developed in FPGA device, then stored at the externalSRAM of processor directly.
     图像数据采集频率可达13.5MHz,信号数据用FPGA芯片实现的SRAM控制器接收,然后直接存入到处理器的外部SRAM中。
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  “sram控制器”译为未确定词的双语例句
     A general description is made on the read-write protocol of SRAM,the overall design,design of individual modules,simulation and verification,implementation in FPGA,as well as its application in digital video systems.
     从SRAM读写协议、总体设计、各子模块的设计、模拟验证、FPGA实现,及其在数字视频系统中的应用等各个角度,对SRAM控制器的设计方法作了较为全面的介绍。
短句来源
  相似匹配句对
     Assertion Based on Functional Verification of SRAM Controller
     基于断言的SRAM控制器功能验证
短句来源
     Design of QDR SRAM Controller and Realization of FPGA
     QDR SRAM控制器的设计与FPGA实现
短句来源
     Microprocessor-Based Flow Controller
     微处理器流体控制器
短句来源
     The validity of the controller was verified by experiment.
     实验证明了控制器的可靠性。
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  sram controller
The SRAM controller internally manages the links in the queues and updates the queue length counters.
      
The SRAM controller incorporates a write-back buffer in order to prevent CPU stalls during back-to-back writes.
      
The SRAM controller keeps the head and tail pointers in onchip registers and increments them as they are used.
      
The node update engines work on 12 Bit data values, which motivates the SRAM controller design.
      


The article introduces the scheme of receiving single frame digital image signal bySRAM in video image capture system. The rate of capturing image data is 13.5MHz. The data isreceived firstly by SRAM controller which is developed in FPGA device, then stored at the externalSRAM of processor directly.

介绍了视频图像捕获系统中用SRAM直接接收一帧数字图像信号的实现方案。图像数据采集频率可达13.5MHz,信号数据用FPGA芯片实现的SRAM控制器接收,然后直接存入到处理器的外部SRAM中。

Technology for design and implementation of a programmable embedded asynchronous SRAM controller is presented.A general description is made on the read-write protocol of SRAM,the overall design,design of individual modules,simulation and verification,implementation in FPGA,as well as its application in digital video systems.The technology is very useful in designing ASIC's and SOC's,where embedded memory controllers are needed.

介绍了一种可编程嵌入式异步SRAM存储控制器的设计与实现方法。从SRAM读写协议、总体设计、各子模块的设计、模拟验证、FPGA实现,及其在数字视频系统中的应用等各个角度,对SRAM控制器的设计方法作了较为全面的介绍。这种设计方法可广泛应用于ASIC芯片、SOC系统等需要嵌入存储控制器的场合。

Currently,we use the constraint-random vector method to verify our functional model.However,there are some short comings in this method: difficult to find bugs and long verification time.In this article,we combine the assertion techniques with the constraint-random method to form the assertion based on functional verification.Through adding some assertions into the design to monitor these features,we could find the design bug more effectively,and decrease the verificational cycle.Taking the SRAM controller for...

Currently,we use the constraint-random vector method to verify our functional model.However,there are some short comings in this method: difficult to find bugs and long verification time.In this article,we combine the assertion techniques with the constraint-random method to form the assertion based on functional verification.Through adding some assertions into the design to monitor these features,we could find the design bug more effectively,and decrease the verificational cycle.Taking the SRAM controller for example,the result shows that the verificatonal time is decreased by 40% than the constraint-random method without adding assertion.

传统的基于约束的随机矢量生成验证技术在验证过程中存在难于定位bug的缺点,从而增加了验证时间。文中将断言技术和随机矢量验证方法相结合形成基于断言的验证方法,通过在设计实现中加入断言,实时监控设计特性,使设计bug更加容易定位,从而缩短验证过程。以SRAM控制器为例,实验结果表明整个验证时间缩短40%以上,加快了设计验证进度。

 
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