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   电路布线 的翻译结果: 查询用时:0.782秒
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电路布线
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  circuit wiring
     The Branch-and-Bound Algorithm for a Kind of Circuit Wiring Problem
     一类电路布线问题的分支限界算法
短句来源
     A generalized circuit wiring problem and its algorithms
     电路布线问题的一种推广及其算法
短句来源
     The parasitic parameter which is caused by MOSFET parasitic capacitance,gate inductor,drain and source inductor,transformer leakage inductor and circuit wiring greatly affect the circuit operational state in the switch mode power supply application.
     在开关电源的实际应用中,MOSFET的寄生电容、栅极电感、漏源极电感,变压器漏感以及电路布线产生的寄生参数,对电路工作状态有很大的影响。
短句来源
     A generalized circuit wiring problem is presented. Some algorithms to this problem based on the dynamic programming and partial order approaches are designed,and the complexity of the proposed algorithms is analyzed.
     提出了一种推广的电路布线问题,对此问题分别设计了基于动态规划和偏序关系的算法,并分析了其算法的复杂性.
短句来源
  circuit layout
     The signal integrity of high-speed signal is introduced, including the concept of high-speed signal, the several common problems about signal integrity, noticeable problems in circuit design, and strategies to high-speed PCB and digital-analog mixed circuit layout.
     本文对高速信号概念的信号完整性理论进行了讨论。 介绍了高速信号的概念、信号完整性的几种常见的问题、电路设计中要注意的问题,以及高速PCB布线和数模混合电路布线的策略。
短句来源
     This kind of device structure, with which a GaAs monolithic integrated 12GHz low noise amplifier has reached a good performance, is beneficial to the reduction of the device area and the convenience of the circuit layout.
     这种器件结构可减小器件占用的GaAs芯片面积,提高电路布线的灵活性,并已应用于12GHz低噪声放大器GaAs单片电路,取得了良好效果。
短句来源
  “电路布线”译为未确定词的双语例句
     Important Operation Explanation Not Mentioned in PROTEL Manual
     PROTEL电路布线手册未说明的操作要点
短句来源
     High frequency circuit routings’ trategies in PROTEL99SE
     PROTEL99SE软件在高频电路布线中的技巧
短句来源
     A Method of Realizing Circuit Routing by Protel with Netlist from Electronics Workbench
     Protel调用EWB网络表的电路布线实现方法
短句来源
     In PCB design, the layout technique of high frequency is adopted to prevent the potential EMC problems.
     在印刷电路板设计中,使用了高频电路布线技术,有效的预防了系统可能产生的电磁兼容性问题。
短句来源
     Area routing based on gridless model is widely used in analog layout. Since there is no grid in the routing process, the router needs to decide the proper position where contact or via will be placed for connecting different routing layers.
     模拟电路布线通常采用无网格的布线模式 ,这就存在如何在整个布线平面中确定连线间的 contact和 via的位置的问题 .
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  circuit wiring
All blank sections shall be fully enclosed to allow branch circuit wiring.
      
Circuit wiring was not in accordance with the controlled drawings and a jumper was being used to bypass a safety feature in the control circuit.
      
In addition, the tighter packing densities that follow from the device scaling reduce the circuit wiring parasitics.
      
In most cases, these systems can be created without the need of any hardware circuit wiring or soldering.
      
Verify branch circuit wiring installation is completed, tested, and ready for connection to wiring devices.
      
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  circuit layout
A new electric circuit layout and physical structure are proposed for an element of protection against electrostatic discharges.
      
The use of the new electric circuit layout and a new simulation technique that takes into account substrate transistors allows reductions in the element's area and its electric capacitance by factors of 1.5 and 1.6, respectively.
      
These versions of the linear arrangement problems occur in several places in current circuit layout systems.
      
A weighted graph embedding technique and its application to automatic circuit Layout
      
The extension of a known technique for graph embedding is presented for the solution of a class of problems arising in computer aided circuit layout.
      
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Circuit layout is an important practical problem in the design of IC and printed circuit boards. Professor Ernest S. Kuh attacked this problem from a theoretical background of graph theory, optimization theory and other mathematical tools, and has obtained remarkable results. In this lecture, he introduced a method of interconnection optimization. An interval graph can be drawn for each scheme of interconnection. The interval graph with the minimum "street congestion" requires a minimum board area for a given...

Circuit layout is an important practical problem in the design of IC and printed circuit boards. Professor Ernest S. Kuh attacked this problem from a theoretical background of graph theory, optimization theory and other mathematical tools, and has obtained remarkable results. In this lecture, he introduced a method of interconnection optimization. An interval graph can be drawn for each scheme of interconnection. The interval graph with the minimum "street congestion" requires a minimum board area for a given number of interconnections. It is further proved that each placement of layout may also be represented by an interval graph, and the interval graph which has the minimum "chromatical number" represents the optimal placement.

在集成电路和印刷电路的版图设计中,电路的布线是一个具有重大实际意义的问题。葛守仁教授应用图论、优化理论等数学工具,对集成电路的布线进行了理论研究,并已经取得了可喜的成果。本文介绍了一种寻求最佳互连(interconnection)方案的方法。著者通过和布线图对应的区间图(interval graph)找出一种“通路稠密度”(street congestion)最小的方案,以达到用最小的版面获得最大的布线数的目的。著者进一步论证了对应于各种布局(Piacement)的区间图中,“包采数”(chromatical number)最小的就代表最佳的布局。

This paper describes a target-oriented line search routing method for automatic circuit layout. This method is easy to be implemented on minicomputers. The basic element in routing is the search line with a given destination. The main features of the router are the target orientation of the search lines, the rational data structures, the small amount of working storage and the reasonably short routing time.

本文提出了一种适合于小型计算机实现的自动布线方法——朝向目标的线探索法。该方法既适用于印制板布线,也可用于集成电路布线,其基本要素是带有预定终点的探索线。方法的特点是线探索针对目标,数据结构合理,所需存储量小,布线速度快。

A unique rapid electron beam processing at low temperature to grow silicides,WSi,and TiSi_x,for LSI and VLSI has been studied experimentally.Silicide films are grownperfectly in less than one minute processing by a large area glow discharge electronbeam at low energy.The film resistivity,its structure and components,as well as lightseattering feature from its surface have been observed.It is worth noting that the superior film growth in <110> orientation has been discovered after e-beam processing.

研究了用于大规模和超大规模集成电路布线和MOS晶体管栅极的难熔金属硅化物,WSi_x和TiSi_x的电子束快速、低温条件下生成的新方法.采用一种新型冷阴极辉光放电的低能大面积电子束装置.处理时间为几十秒.测量了硅化物的电导,薄膜成分结构以及表面的光散射特性.结果表明经过电子束处理的薄膜,形成了良好的硅化物;并且还出现了某些独特的(110)晶面择优生长的结构特性.由于处理时间短,温度低,这种快速处理方法有希望用于VLSI研究.

 
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