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级联积分梳状滤波器
相关语句
  cascade integrator comb filter
     Design and Implementation of Cascade Integrator Comb Filter Based on FPGA
     基于FPGA的级联积分梳状滤波器设计与实现
短句来源
     For the multi-rate signal processing in software radio,the structure and principles of Cascade Integrator Comb filter are introduced,and a detailed design based on FPGA is given.
     针对软件无线电中的多速率信号处理,介绍了级联积分梳状滤波器的基本组成及设计原理,给出了基于FPGA的具体设计方案及实现方法。
短句来源
  “级联积分梳状滤波器”译为未确定词的双语例句
     Sharpened_CIC is the improved structure of Casecaded Integrator Comb Filter(CIC),some morden EDA solution for ACIS/FPGA is introduced for the implementation of the filter.
     在分析了广为应用的级联积分梳状滤波器(CIC)的改进结构Sharpened_CIC的基础上,引入了一些专用集成电路/可编程芯片的现代EDA设计技术,给出一种它的实现方案;
短句来源
     This paper studies the high decimation ratio of digital down converter,and especially analyzes the multi-stage decimation algorithm based on CIC filter and HB filter.
     该文研究了高倍抽取的数字下变频设计,重点分析了基于级联积分梳状滤波器和级联半带滤波器的多级抽样频率算法。
短句来源
     Studied high decimation ratio of digital down converter,and especially analyzed multi-stage decimation algorithm based on cascaded integrator-comb(CIC) filter and half band(HB)filter.
     研究了高倍抽取的数字下变频设计,重点分析了基于级联积分梳状滤波器和级联半带滤波器的多级抽样频率算法。
短句来源
     The simulation wave of mixer,CIC filter and DDC were all shown.
     对于混频器、级联积分梳状滤波器和数字下变频器都给出了仿真波形。
短句来源
     The proposed decimation filter consists of Cascaded-Integrated-Comb(CIC) filter,compensation lowpass filter and narrow transition-band finite impulse response(FIR) filter using canonic signed digit(CSD) number system.
     该抽取滤波器包括:级联积分梳状滤波器、补偿滤波器和一个窄带有限冲击响应半带滤波器。 滤波器系数都采用CSD(Canonic SignedDigit)码实现。
短句来源
  相似匹配句对
     Design and Implementation of Cascade Integrator Comb Filter Based on FPGA
     基于FPGA的级联积分梳状滤波器设计与实现
短句来源
     Implementation of CIC filter based on FPGA
     积分梳状滤波器在FPGA中的实现
短句来源
     Form wave filter is combed to the numeral
     数字梳状滤波器
短句来源
     The simulation wave of mixer,CIC filter and DDC were all shown.
     对于混频器、级联积分梳状滤波器和数字下变频器都给出了仿真波形。
短句来源
     The filter of cascaded integrator comb is becoming more important in the application of digital down converter(DDC).
     在数字下变频(DDC)中,C IC(级联积分梳状)滤波器起着重要的作用。
短句来源
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Aimed at the design of the parachute-airdrop remote control receiver, the sampler based on software radio technique was studied. The high efficiency filter, cascaded integrator-comb filter (CICF) and the cascaded compensation filter used in sampling rate conversion system was discussed. Simulation results show that the proposed CICF linked with compensation filter is effective.

针对翼伞空投遥控接收机的软件无线电实现问题,对软件无线电技术中的抽取器在遥控接收机中的应用进行研究,重点分析了数据率转换系统中的高效数字滤波器—级联积分梳状滤波器(CICF)及其级联补偿滤波器的设计问题,并通过仿真证明其在翼伞空投遥控接收机中的有效性.

For the multi-rate signal processing in software radio,the structure and principles of Cascade Integrator Comb filter are introduced,and a detailed design based on FPGA is given.The result of simulation shows that the design is simple and feasible,convenient and flexible to use,of high ratio for quality to price,and can be applied in a variety of multi-rate signal processing systems.

针对软件无线电中的多速率信号处理,介绍了级联积分梳状滤波器的基本组成及设计原理,给出了基于FPGA的具体设计方案及实现方法。仿真结果表明,该设计简单合理,使用灵活方便,具有良好的性价比,可应用于各种多速率信号处理系统。

Digital down conversion plays a key role in the digitized and software-oriented process of the receiver system. This paper studies the high decimation ratio of digital down converter,and especially analyzes the multi-stage decimation algorithm based on CIC filter and HB filter. It will reduce the cost and the development time by using the newest Systemgenerator which can simulate the design and download it to FPGA easily. And verifying the design with an ISA bus of computer will save lots of money, effectively....

Digital down conversion plays a key role in the digitized and software-oriented process of the receiver system. This paper studies the high decimation ratio of digital down converter,and especially analyzes the multi-stage decimation algorithm based on CIC filter and HB filter. It will reduce the cost and the development time by using the newest Systemgenerator which can simulate the design and download it to FPGA easily. And verifying the design with an ISA bus of computer will save lots of money, effectively. Using MATLAB design and simulation hardware projects based on FPGA is a good method.

数字下变频在接收系统的数字化和软件化过程中起到了至关重要的作用。该文研究了高倍抽取的数字下变频设计,重点分析了基于级联积分梳状滤波器和级联半带滤波器的多级抽样频率算法。采用最新的设计软件Systemgenerator软件可以方便地在MATLAB中实现算法仿真并可生成FPGA芯片的下载文件,简化了设计流程,降低了开发成本和周期。提出了一种基于计算机ISA总线的系统验证方法。用Systemgenerator设计和仿真基于FPGA芯片的的硬件设计有效地验证了算法并降低了试验成本,是一种好方法。

 
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