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接口控制器
相关语句
  interface controller
    FPGA-Based ZBT SRAM Interface Controller
    基于FPGA的ZBT SRAM接口控制器的设计
短句来源
    Design of IDE Interface Controller Core
    一种IDE接口控制器内核的设计
短句来源
    FPGA Design of PCI Bus Interface Controller
    PCI总线接口控制器的FPGA设计
短句来源
    Design and Implementation of General Purpose Interface Controller GPIO_WB IP Core
    通用接口控制器GPIO_WB IP核设计与实现
短句来源
    IP Core Design of a Parallel Interface Controller
    并行接口控制器IP核设计
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  “接口控制器”译为未确定词的双语例句
    Design and realization for interface of PCI based on FPGA
    基于FPGA的PCI目标接口控制器的设计与实现
短句来源
    PCI Interface Implementation Using FPGA Devices
    基于FPGA的PCI接口控制器设计与实现
短句来源
    The controllers of Universal Serial Bus (USB) and General Purpose 10 Interface (GPIO) are the two very important peripheral controllers in SoC field.
    通用串行总线(USB)和通用IO接口(GPIO)控制器是SoC芯片中非常重要的两种外围接口控制器
短句来源
    As the core technology of OFDM, FFT module is designed with the IP Core of which the interface follows ALTERA Atlantic protocol.
    然后对OFDM核心部分的FFT算法进行FPGA的IP Core设计实现,严格按照ALTERA Atlantic接口协议实现了IP Core的接口控制器,同时实现了QAM映射器、循环前缀、加窗处理和乒乓操作的RAM缓冲模块。
短句来源
    On the basis of research on the boun d ary-scan architecture and TAP controller, the paper implements a design for a T AP interface based on JTAG specification in a test system.
    该文在研究边界 扫描体系结构和TAP接口控制器的基础上,在一个测试系统中,实现了基于JTAG规范的主TA P 接口设计。
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  interface controller
The interface controller of an IBM personal computer, which is supported by the CAMAC-COMPEX protocol, is described.
      
Peripheral Interface Controller is used to derive different pulse patterns.
      
A dedicated onchip test controller supervises this VME test mode so that even the VME interface controller can be tested.
      
Generic bloc diagram of network interface controller Therefore, NICs must be partially specifically designed for every specific on-chip bus.
      
If a user interface does not contain an HES interface, it must be connected to an interface controller.
      
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Boundary-scan technique(BST) is a new and effective way of test and design for testability for VLSI circuits. On the basis of research on the boun d ary-scan architecture and TAP controller, the paper implements a design for a T AP interface based on JTAG specification in a test system.

边界扫描机制是一种新型的VLSI电路测试及可测试性设计方法。该文在研究边界 扫描体系结构和TAP接口控制器的基础上,在一个测试系统中,实现了基于JTAG规范的主TA P 接口设计。

VXIbus is VMEbus extensions for instrumentation.In the process of designing embedded computer, the VMEbus interface controlling circuits is important and also the most difficult part.This paper fully discusses how to use VMEbus interface controller VIC068A and VMEbus address controller VAC068A to design the translating circuit from ISAbus to VMEbus and also gives out a scheme for DTB bus.

详细讨论了运用VMEbus接口控制器VIC068A和地址控制器VAC068A进行ISA总线到VME总线转换的电路设计方法,并给出了数据传输(DTB)总线的设计方案.

Studies issues in the finite state machine (FSM) design in PCI bus interface controllers. The PCI top-level block design is first presented in terms of the bus interface controller. The FSM model of target PCI bus interface controller is then provided based on PCI bus operation timing. The basic operation of the bus controller is described with the Altera's FLEX10K FPGA device and Verilog HDL, along with the function simulation and synthesis and the FPGA design of the PCI bus controller. This brings out the...

Studies issues in the finite state machine (FSM) design in PCI bus interface controllers. The PCI top-level block design is first presented in terms of the bus interface controller. The FSM model of target PCI bus interface controller is then provided based on PCI bus operation timing. The basic operation of the bus controller is described with the Altera's FLEX10K FPGA device and Verilog HDL, along with the function simulation and synthesis and the FPGA design of the PCI bus controller. This brings out the strong points of the FSM, such as its clear structure and easy maintance.

研究有限状态机与PCI总线接口控制器的设计问题.在分析PCI总线接口控制器基本功能的基础上,给出其顶层设计.根据PCI总线操作时序,提出了从设备接口控制器的有限状态机模型.同时结合AlteraFLEX10K的FPGA器件,采用Verilog硬件描述语言,描述该总线控制器的基本操作,并完成功能仿真与综合,实现了PCI总线控制器的FPGA设计,说明该有限状态机具有结构清晰、易于维护的特点.

 
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