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实时处理器
相关语句
  real-time processor
     Based on the skew cyclic convolution distributed algorithm presented by W. Li[1],a 2-dimensional 8×8 DCT/IDCT real-time processor utilizing FPGA has been designed,which can be used for high data rate applications.
     在W.Li提出的循环斜卷积分布算法[1]的基础上,利用FPGA设计可用于高速数据传输设备的二维8×8DCT/IDCT实时处理器
短句来源
     The paper describes the Advanced Real-time Processor Architecture ,and briefly describes the methodology followed in the design of a System on Chip solution that is being developed for embedded real-time control applications. It integrates in a single device all the digital electronics, reducing the required external logic to a minimum.
     文章阐述了高级的实时处理器结构,并且讨论了嵌入式实时控制SoC的设计方法,该设计方法支持高速实时控制,在单芯片上集成了全部的数字器件,将外围逻辑减少到最低限度。
短句来源
     When these video signals are inputted to the real-time processor of SAR after sampled through A/D,the performance of continuous dynamic imaging for SAR can be examined,such as join of real-time images,doppler frequency center,moving compensation of airplane and the performance of front-slant imaging,etc.
     把这种视频信号通过A/D采样送入SAR实时处理机,用来考查SAR实时处理器连续动态成像的性能,如实时性图象拼接、多普勒中心估计、载机运动补偿及SAR前斜视成像性能等.
短句来源
  real-time handler
     A control services module provides the production process control of each production line, and the information real-time handler provides services for consumer by means of the administrator interface.
     每条生产线生产过程控制各由一个控制服务模块提供,信息实时处理器通过用户界面向管理员提供服务。
短句来源
  “实时处理器”译为未确定词的双语例句
     Design of Real-Time Vedio Image Processor
     视频图象实时处理器的设计
短句来源
     The system is based on DSP+FPGA structure, and by adopting various algorithms in the hardware circuit to suppress image noises and to improve image quality, we finished the modularization real-time infrared image processing system.
     系统以DSP+FPGA为架构,将多种适用于红外图像处理技术的抑制噪声和图像增强的新型简化算法应用于硬件电路系统,完成了模块化红外图像实时处理器的研制。
短句来源
     Since Fast Fourier Transform (FFT) is the core technique- of DSP, we finally implement float-point FFT with Very High Speed Hardware Description Language (VHDL) and analyse code coverage of the whole process with our ownbestbench.
     由于快速傅立叶变换(FFT)是DSP的核心技术,所以本文用VHDL语言实现了一个浮点FFT实时处理器,并编写了测试平台,进行了代码覆盖分析。
短句来源
     The system's overall scheme is made and argued partly, the key technology of the hardware of the LLL video real-time processing system are studied deeply, including the design of video input and output module, digital video compressing, decompressing and storing module, data buffering module between DSP and video input and output module.
     参与了整个系统方案的论证与制定,重点对微光图像实时处理器硬件实现关键技术进行了研究,主要包括:视频图像输入与输出模块设计、数字化视频图像压缩解压缩和存储模块设计以及DSP芯片与输入输出模块之间的缓冲结构设计;
短句来源
     The first chapter of the paper introduces the characters of MPC8260 and wholedesign scheme of our system.
     论文第一章对嵌入式实时处理器MPC8260进行了简要介绍并给出了应用MPC8260设计的网络通信平台的整体结构;
短句来源
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  相似匹配句对
     Processors
     处理器
短句来源
     G.
     实时的G.
短句来源
     Optical logic processor by real time coding
     实时编码的光学逻辑处理器
短句来源
     Design of Real-Time Vedio Image Processor
     视频图象实时处理器的设计
短句来源
     Real-time CORBA
     实时CORBA
短句来源
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  real-time processor
The digitized data output from the ADCs are multiplexed and sent to the real-time processor.
      
The highly parallel implementations possible with FPGAs allow realization of the entire real-time processor in only two chips.
      
The same idea have been adopted in our laboratory in development of a real-time processor.
      
  real time processor
Figure 2 shows an example of the ozone distribution along an orbit of GOME on September 19, 2000 retrieved with the near-real time processor.
      
It includes a VME-bus real time processor and analog interface boards.
      
Real-time code can then be generated for execution on the real time processor.
      
These results, along with the comparison of the new results with the data retrieved by the ESA Level 2 near-real time processor will be presented.
      


Based on the skew cyclic convolution distributed algorithm presented by W. Li[1],a 2-dimensional 8×8 DCT/IDCT real-time processor utilizing FPGA has been designed,which can be used for high data rate applications. It has been designed to compute either the DCT or the IDCT depending on a single line control signal. All of the input/output are 14-bit,and the internal data bus and internal parameters are 16-bit.

在W.Li提出的循环斜卷积分布算法[1]的基础上,利用FPGA设计可用于高速数据传输设备的二维8×8DCT/IDCT实时处理器。它可用一根信号线控制计算DCT/IDCT,其输入、输出为14位、内部数据线及内部参数均为16位。

This paper introduces a real-time video image processor, applied for automatic target tracker in a simulating experiment system. The hardware consists of TMS34010 graphic system processor (GSP) and TMS320C25 high speed digtal signal processor (DSP). With the adoption of correlation-tracking algorithm, it can provide real-time processing for the searching array consisting of 64×64 pixels and the match array consisting of 32×32 pixels.

介绍了一个用于目标自动跟踪仿真实验系统的视频图象实时处理器.该处理器硬件由图形图象处理芯片TMS34010和高速数字处理芯片TMS320C25构成,采用相关跟踪算法时,对目标模板32×32象素和搜索区64×64象素处理能达到实时.

The model of radar echo signal is founded based on the analysis of SAR imaging theory in this paper.Thereout,a method used to make SAR echo data is put forward.Then,the software simulation of real time imaging of airborne SAR is completed with this kind of data by Pentium PC.The echo data simulation method can be used to examine the performance of SAR processor in producing continuous dynamic images,connection of realtime images,motion compensation of aircratf,etc.

在分析合成孔径雷达成像原理的基础上 ,建立了雷达回波信号模型 ,提出了一种生成回波数据的方法。并利用这种回波数据 ,在奔腾 PC机上实现了机载合成孔径雷达的实时成像软件仿真。该实时成像方法可用于考核合成孔径雷达 ( SAR)实时处理器连续动态成像的性能、如 :实时性图像拼接 ,载机运动补偿等。

 
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