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多晶体管
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     Transistor
     晶体管
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     A MULTI-STAGE TRANSISTOR IF AMPLIFIER
     晶体管中频放大器
短句来源
     High Speed Switch Based on Multiple β Transistor and Its Applications
     基于β晶体管的高速开关及其应用
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     Avalanche Injection Transit Time Transistor
     崩越晶体管
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     TRACKING OF MULTIPLE TARGETS
     目标跟踪
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  multiple transistor
Multiple supply voltages, multiple transistor thresholds and transistor sizing could be used to reduce the power dissipation of digital blocks.
      
We can then model a wide range of attack scenarios from single to multiple transistor failures.
      


This paper introduces a new processor architecture, called "Parallel Multithreaded Architecture (PMA)". A PMA processor consists of multiple "logical processors". Multiple pipelined functional units are provided and shared by the logical processors. The PMA processor tries to issue multiple instructions from multiple instruction threads in every clock cycle. Compared to Single-Chip Multiprocessors, the PMA processor can exploit both the Instruction Level Parallelism (ILP) and Thread Level Parallelism (TLP),...

This paper introduces a new processor architecture, called "Parallel Multithreaded Architecture (PMA)". A PMA processor consists of multiple "logical processors". Multiple pipelined functional units are provided and shared by the logical processors. The PMA processor tries to issue multiple instructions from multiple instruction threads in every clock cycle. Compared to Single-Chip Multiprocessors, the PMA processor can exploit both the Instruction Level Parallelism (ILP) and Thread Level Parallelism (TLP), and can efficiently use the large amount of functional units. A possible PMA processor implementation and the issues of software supporting are also discussed.

随着微电子技术的发展,单个芯片可以集成越来越多的晶体管。目前的预测是,在未来的十五年,十亿晶体管可以做在一个芯片上。如何充分利用这巨大的资源,计算机体系结构设计者纷纷提出了许多建议。本文在探讨处理机体系结构发展过程的基础上,提出了一种新的"并行多线程体系结构—PMA"。PMA的主要想法是把多个逻辑处理机集成在同一芯片上,而且多个执行部件由这些逻辑处理机所共享。在每个周期,处理机从多个线程取出多条指令调度执行。与简单的单片多处理机相比,它提高了执行部件的利用效率。另一个特点便是PAM同时支持指令级和线程级的并行操作。在描述了PMA的基本原理之后,本文给出了一种可能的PMA硬件实现方案,并且讨论了对软件支持PMA所提出的新的要求。

With the development of VLSI technology, a single chip can contain over one billion transistor. Multithreading technique is the developing trend of high performance processor in the future. A novel processor architecture and implementation scheme of the simultaneous multi-microthreading(SMMT) that combines simultaneous multithreading technique with microthreading technique is proposed in this paper. SMMT efficiently combines the advantage of little hardware overhead in simultaneous multithreading with the ability...

With the development of VLSI technology, a single chip can contain over one billion transistor. Multithreading technique is the developing trend of high performance processor in the future. A novel processor architecture and implementation scheme of the simultaneous multi-microthreading(SMMT) that combines simultaneous multithreading technique with microthreading technique is proposed in this paper. SMMT efficiently combines the advantage of little hardware overhead in simultaneous multithreading with the ability of speeding up single program in micro-threading. SMMT can exploit the microthreading-level parallelism of single program fully by means of software and hardware co-design. Simultaneous multi-microthreading architecture is implemented on Godson-2 processor to evaluate performance. The evaluation results show that simultaneous multi-microthreading speeds up the execution of a single program significantly. It improves the performance of microprocessors with little hardware overhead.

随着生产工艺的提高,芯片上能集成越来越多的晶体管,多线程技术也逐步成为一种主流的处理器体系结构技术.提出一种融合同时多线程技术和微线程技术的新型体系结构同时多微线程(simul-taneous multi-microthreading,SMMT),并给出同时多微线程体系结构的实现方案.SMMT有效结合同时多线程技术硬件代价小和微线程技术能够加速单进程应用的优点,通过软硬件协同的方式充分挖掘单进程程序的微线程级并行性.通过在设计的龙芯2号同时多微线程处理器上进行性能评测,结果表明,同时多微线程体系结构能够有效地加速单进程的程序,以很小的硬件代价显著地提高了处理器的性能.

 
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