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线速     
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  line rate
     The main function characteristic of the commercial chip PM3388 of ten port Gbit Ethernet chain interface and inside structure, are introduccd in this paper the design of chain interface system of Ethernet based on PM3388 chip is explainedand realized, test result indicates the system meets 10×1G Ethernet frame performance demand that it is processed by line rate.
     介绍了十端口Gbit以太网链路接口商用芯片PM3388的主要功能特性和内部结构,阐述了基于PM3388芯片的以太网链路接口系统的设计与实现,测试结果表明该系统满足10×1G以太网帧线速处理的性能要求.
     Then the forwarding engines are verified by xilix FPGA and the results show that the architecture is correct and the packet can be forwarded in 2.5G line rate.
     测试结果表明,该文设计的转发引擎的结构正确,可以达到2.5G端口线速转发,满足了设计要求。
短句来源
     The employing of network processor and HSIPBG proved to allows the solution for firewall working line rate in 1G or higher broadband with high performance and expansibility by experiment.
     实验证明网络处理器技术以及HSIPBG算法的运用为1G及更高带宽下的防火墙提供了高性能、可扩展性线速千兆防火墙解决方案。
短句来源
     A Way to Achieve Line rate Forward Ability of PIM-SM
     一种实现PIM-SM组播数据线速转发的方案
短句来源
     This article focuses on packet filtering firewall used on gigabit network and presents a packet classification algorithm called HSBIPG(Hash Search Based on IP Group). Then we analyze advantages and disadvantages of this algorithm. Finally, we implement a line rate gigabit packet filtering firewall using this algorithm on IXP2400 network processor and it proved to be feasible and efficient by experiment.
     针对千兆网下包过滤防火墙,提出了HSB IPG(Hash Search Based on IP Group)包分类算法,并分析了算法的优缺点,基于该算法用IXP2400实现了线速千兆包过滤防火墙,通过实验证明了此算法是可行和高效的。
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  wire-speed
     NP4GS3C, a type of 2.5G network processors produced by IBM,supports wire-speed forwarding and sophisticated QoS.
     NP4GS3C是IBM推出的2.5G网络处理器,支持线速转发和强大的QoS功能。
短句来源
     It satisfies wire-speed (48B-packet) forwarding of OC-768 (40Gbps) interfaces of IPv4/IPv6 dual-stack core routers.
     可满足IPv4/IPv6双协议栈核心路由器OC-768(40Gbps)端口、48B包的线速转发.
短句来源
     It satisfies wire-speed (48B-packet) forwarding of double OC-768 (40Gbps) interfaces of IPv4 core routers.
     满足了IPv4核心路由器的双OC-768(40Gbps)端口、48B包的线速转发。
短句来源
     It satisfies wire-speed(48B-packet)forwarding of double OC-768(40Gbps)interfaces of IPv4 core routers.
     满足IPv4核心路由器的双OC-768(40Gbps)端口、48B包的线速转发。
短句来源
     It is scalable on prefix length and satisfies wire-speed (40B-packet) forwarding of OC-48 (2.5Gbps) /OC-192 (10Gbps)interfaces of IPv4/IPv6 dual-stack routers.
     算法扩展性好,可满足IPv4和IPv6两种协议栈的OC-48(2.5Gbps)、OC-192(10Gbps)接口的线速路由查找。
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  wire speed
     Programmable network processors provide system flexibility while delivering the high-performance hardware functions required to process packets at wire speed.
     可编程的网络处理器不但提供了以线速处理数据包的高性能的硬件功能,同时还具备极大的系统灵活性。
短句来源
     we present packet classification algorithm based on bitmap and tuple space. It can process input packets at wire speed by router.
     通过引入位图映射以及元组空间的概念,提出了一个数据包分类算法,该算法可以满足高性能网络对骨干路由器的要求,能够以线速完成对输入数据包的分类处理。
短句来源
     In this paper, the recent advance in the research of wire speed packet input processing is survdyed, and the key problems and solutions of wire speed packet input processing are analyzed in detail.
     综述了近年来数据包输入处理的最新研究进展 ,详细分析了线速数据包输入处理的关键问题和解决方案 .
短句来源
     THE KEY RESEARCH OF NEXT-GENERATION WIRE SPEED PACKET CLASSIFICATION NETWORK
     新一代线速网络关键问题的研究
短句来源
     After that, Gigabit ( Terabit) wire speed route switch is introduced to solve the rate problem of conventional router.
     吉(太)位线速路由交换机则在根本上解决了速度问题,由CPU运行软件及专用集成电路硬件来分别完成计算、控制等非实时任务及包转发等实时任务.
短句来源
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  line speed
     With the development of IPv6 and MPLS protocols,forwarding engines need provide the line speed processing of IPv4,IPv6 and MPLS packets.
     基于IPv6、MPLS的新兴业务不断承载到IP网,要求路由器转发引擎同时支持IPv4、IPv6、MPLS报文的线速转发。
短句来源
     Design on Constant Line Speed Controller for Variable Frequency Speed Control System
     变频调速系统恒线速控制器的设计
短句来源
     3. Designed and realized a high speed table lookup pipeline by "FPGA+TCAM+SRAM" to satisfy the 10Gbps line speed lookup of the 40 bytes packet length , this pipeline design can implement lookup speed at 100 million searches per second.
     3.为了实现10Gbps速率40字节报文的线速查表,设计并实现了一种由“FPGA+TCAM+SRAM”实现的高速查表流水线,该流水线可达100MPPS的查表速度;
短句来源
     This paper analyzes the iuput and output processing flow in the 10G LAN convergence interface board, realizes line speed disposal of 10G with pipeline processing architecture, and realizes a high speed table lookup pipeline by "FPGA+TCAM+SRAM" which can implement the lookup speed at 100 million searches per second.
     (?) 分析10GLAN汇聚接口板FPGA的输入、输出处理流程,采用流水线技术实现了输入、输出的10G线速处理,并采用FPGA+TCAM+SRAM方式实现输出查表,达到了100MSPS的查找速度。
短句来源
     After a practical testing, it indicates the scheme can guarantee the integrity of protocol and raise the forwarding performance exceedingly which amounts to 10G interface line speed forwarding .
     经过实际的测试表明,该方案在保证协议功能一致性的前提下,能够大大提高组播数据转发性能,使得数据达到10G接口的线速转发能力,满足了T比特路由器对高性能组播的要求,是一种高效可行的PIM-SM组播实现方案。
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  line rate
The above principles can guarantee forwarding of IP packets at line rate.
      
The resulting header can be processed using slower electronics than the line rate without any sacrifice of the information transfer rate and with higher immunity with respect to degradation of the optical signal-to-noise ratio (OSNR).
      
Additional Preamble bytes may be necessary depending on the expected receiver characteristics and the transmitted line rate.
      
Additional Postamble bytes may be necessary depending on the expected receiver characteristics and the transmitted line rate.
      
A modern IA32 server can comfortably handle a 1Gb/s Ethernet interface at line rate with most of its CPU cycles to spare.
      
更多          
  wire-speed
Accelar routing switches support wire-speed IP routing between VLANs as shown in Figure 4-2.
      
A switch's ability to transmit and receive packets on all ports simultaneously, at wire-speed.
      
A network processor aims in accomplishing wire-speed protocol processing, at a reasonable cost.
      
As shown by technology demonstrations, wire-speed storage traffic can be driven across immense distances with minimal latency.
      
By using this wire-speed and stateful approach, operators can profitably deliver an array of data services customized to individual subscriber needs.
      
更多          
  wire speed
It is found that increasing the pulse duration, open circuit voltage, and wire speed increases the crater size, whereas increasing the dielectric flushing pressure decreases the crater size.
      
In this study, the machinability of standard GGG40 nodular cast iron by WEDM using different parameters (machining voltage, current, wire speed, and pulse duration) was investigated.
      
Using Taguchi's parameter design, significant machining parameters affecting the performance measures are identified as discharge current, pulse duration, pulse frequency, wire speed, wire tension, and dielectric flow.
      
The limiting current densities from these transients,EIL, are higher and increase with wire speed at a smaller rate than the potentiodynamicIL.
      
Any delay introduced into the network that prevents packet forwarding at wire speed.
      
更多          
  line speed
Fiber orientation in the production line is good and stable irrespective of position across the width of the production line, time of day and changing line speed.
      
Ther evaluation is independent of the line speed up to 325 m/min.
      
The hyperspectral online line-scan system was integrated with a commercial apple-sorting machine and evaluated to inspect apples for fecal contamination and defects at a processing line speed of over three apples per second.
      
Important parameters are the user's peak transmission rate p, which is the access line speed, the user's guaranteed minimum rate r, and the bound ε on the fraction of lost data.
      
The results of laboratory and mill tests are compared with the predictions of the analytical model and engineering considerations for jet nozzle operation to reduce coating weight at increased line speed are discussed.
      
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