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data transfer
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  data transfer
The outcome shows that the communication system of an agent-based automated substation improves the accuracy and reliability of the data transfer and presents it in real-time.
      
Analysis of the Random Flow Generated by the Feedback Transport Protocol in a Data Transfer Network
      
A mathematical model for the distributed traffic control algorithm used in modern data transfer networks is designed and distributions of the important characteristics of the algorithm are derived.
      
Typical subsystems of complex telecommunication networks, such as computing systems, two-pole data transfer networks and others, are investigated.
      
Along with interferences, multipath propagation and, in particular, its instability in shallow sea is the main obstacle to increasing the digital data transfer rate in underwater acoustic communication systems.
      
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Three proceduces for testing register decoding, instruction decoding, data transfer, data storage and data manipulation function faults in microprocessors are described step-by-step in this paper. Each procedure is used for testing several types, instead of one type, of functional faults to simplify the testing. In addition, WRITE and READ decoding faults are tested separately, the proceduees presented in this paper thus have high fault coverage and efficiency.

微处理机的功能测试无论对微处理机的设计、生产和使用都是非常重要的.本文是Thatteand Abraham给出方法的扩展和补充.本文的测试方法能诊察某些文献给出的方法不能诊察的故障,利用一个测试,检查几种类型的功能故障,而使测试简化.

In this paper the concept of microfunction is first defined and then a fault model for the instruction sequencing function of microprocessors is introduced. According to the features of ALU, a corresponding fault model is given. In our testing algorithm for microprocessors, a modified finite state machine defined in this paper is first checked, and an initialization sequence for microprocessors is obtained. Then, the testing procedures of the instruction sequencing function and the data transfer function...

In this paper the concept of microfunction is first defined and then a fault model for the instruction sequencing function of microprocessors is introduced. According to the features of ALU, a corresponding fault model is given. In our testing algorithm for microprocessors, a modified finite state machine defined in this paper is first checked, and an initialization sequence for microprocessors is obtained. Then, the testing procedures of the instruction sequencing function and the data transfer function are derived. It is proved that this two testing procedures must be the testing procedures of microprocessors, thus simplifying the test generation of microprocessors. Finally, the test procedures of the instruction sequencing function presented in this paper are compared with the method in [2].

本文首先定义微功能的概念,并由此引出了微处理器中指令时序功能块的故障模型。根据算术逻辑单元的特点,给出了相应的故障模型本文的微处理器测试算法首先核实一个本文定义的变形有限状态机,从而得到微处理器的初始化序列。继而给出了指令时序功能块和数据传输功能块的测试算法,并证明了这两个功能块的测试算法就是微处理器的测试算法,从而简化了微处理器的测试生成。最后将本文指令时序功能块测试算法和文献[2]的方法进行了比较。

In the design of high speed data acquisition, measurement & control technology, and multiprocessor system, it is always needed to transfer large quantities of data in high speed. Dual—port memory (DPM), as a new type of memory structure, has been widely used. Its data transfer speed is only limited by the accessing time of memory. The paper analyses the theory of dual—port memory, introduces its design method. Furthermore, the paper discusses the expansion of DPM. and its application in multiprocessor...

In the design of high speed data acquisition, measurement & control technology, and multiprocessor system, it is always needed to transfer large quantities of data in high speed. Dual—port memory (DPM), as a new type of memory structure, has been widely used. Its data transfer speed is only limited by the accessing time of memory. The paper analyses the theory of dual—port memory, introduces its design method. Furthermore, the paper discusses the expansion of DPM. and its application in multiprocessor network.

在高速数据采集,测控技术以及多处理器系统的设计中,往往需要高速传送大量的数据,双端口存储器作为一种新型的存储结构,数据传送速率仅受存储器存取时间的限制,已得到了广泛的应用。本文分析了双端口存储器的原理,介绍了双端口存储器的设计方法,还讨论了双端口存储器的扩展及其在处理器联网中的应用。

 
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