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power dissipation     
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  功耗
     The chip area is 0.865 mm~2; power dissipation is 83.37 mW in 100 Mb/s and 109.6 mW in 10 Mb/s.
     芯片面积0.865 mm2,100 Mb/s时功耗为83.37 mW,10 Mb/s时功耗为109.6 mW.
短句来源
     At present, the volume of the module used in 565 Mbit/s or 622Mbit/s is 50×50×6 (mm~3), and its power dissipation is about 1.8W.
     目前实际制成的可用于565 Mbit/s或622 Mbit/s的模块体积为50×50×6(mm~3),功耗约1.8W。
短句来源
     The maximum power dissipation is less than 7.2 μW and the area of layout is about 0.3 mm×0.4 mm with a standard 0.25 μm 2P5M CMOS process.
     该基准源的最大功耗小于7.2μW,采用0.25μm 2P 5M CM O S工艺实现的版图面积为0.3 mm×0.4 mm。
短句来源
     The power dissipation of the circuit is 0.16mW,and the area is 0.18mm~2.
     电路的功耗为0.16mW,芯片面积是0.18mm2.
短句来源
     Results from simulation show that the circuit has a forward power gain of 15.67 dB,a noise figure of 2.88 dB,an IIP3 of-0.21 dBm,and a power dissipation of 25.79 mW.
     结果表明,该电路的正向功率增益为15.67 dB,NF为2.88 dB,IIP3为-0.21 dBm,功耗为25.79 mW。
短句来源
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  功率损耗
     A power dissipation model of 4H-SiC MPS was established.
     建立了4H-SiC MPS的功率损耗的解析模型并对其功率损耗特性进行了计算。
短句来源
     Analysis and Experimentation of Power Dissipation in Several Boost PFC Circuit
     几种Boost电路的功率损耗分析与实验研究
短句来源
     Especially for Digital/Analog mixed circuits---A/D converting circuits, the requirements for converting precision and speed are becoming more and more, leading to more requirements for low power dissipation.
     随着电子技术的发展,低功耗电路已经成为集成电路设计的核心问题之一,特别是对于典型的数/模混合电路——A/D转换电路——来说,在对转换精度和转换速度要求不断提高的情况下,对电路的功率损耗的要求也越来越高。
短句来源
     Bus switches have gained wide acceptance in this voltage translation application due to negligible propagation delay (tPD 250ps) and minimal power dissipation (ICC 10A).
     由于极小的传播延迟(tPD 250微微秒)和最小限度功率损耗(ICC 10安)的要求,在电压传送应用上,总线开关已经获得了广泛的认可。
短句来源
     Analysis of Power Dissipation Characteristics of MPS Based on SiC
     碳化硅MPS的功率损耗特性分析
短句来源
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  功率耗散
     The results of some experiments on quiierons are given,Quiteron curentgaini abot 30 to 100,the power gain about 6 to 10,and the power dissipation about 10 microwatts. The switch speed can te reached 50 ps.
     超导管的初步实验结果是:它的电流增益达30—100,功率增益为6—10,功率耗散为10—50微瓦,实际开关速度可望达50微微秒。
短句来源
     Optimized Coordination of Fluid-flow Output-Power and Power Dissipation
     流体流动的输出功率与功率耗散的协调优化
短句来源
     From the result, the power dissipation mainly in the time of positive period,Which was the time of heat break down, 10GHz was the close frequency.
     计算表明 ,二极管功率耗散主要集中在源电压正半周峰值附近 ,器件的热击穿应发生在信号的正半周期内 ,10GHz应可视为该二极管对微波信号响应的截止频率
短句来源
     The main superiorities of TSPD device are small volume, lower power dissipation and precise transition voltage.
     TSPD的主要优势在于其小巧的体积、导通状态下较低的功率耗散以及精确的“转折”电压。
短句来源
     The special design of anode can make the transition possible from convective heat transfer state of cooling water to its high-efficiency boiling heat transfer state so that allowance power dissipation density of anode is greatly increased.
     指出通过阳极的特殊设计可以把冷却水的对流换热状态过渡到高效率的沸腾换热状态,大大提高了阳极允许功率耗散密度。
短句来源
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  功率消耗
     The chip size including bonding pads is only 0.4 mm×0.4 mm and the power dissipation falls inside the scope of 28.3 to 48.8 mW operating at a supply voltage of 4.5 to 5.5 V.
     包括键合用的焊盘在内 ,芯片的总面积仅为 0 4mm× 0 4mm ,当电源电压在 4 5~ 5 5V范围内变化时 ,电路总的功率消耗在 2 8 3~ 4 8 8mW之间浮动 .
短句来源
     The topology of LNA was chosen,noise was analyzed under given power dissipation to choose the optimum width of transistor to obtain the minimum noise figure.
     首先选取LNA结构,推导出噪声模型,然后选取在固定功率消耗下最小噪声系数对应的晶体管尺寸,再进行输入输出阻抗匹配和电路调整优化.
短句来源
     Power Dissipation of Copper Ion Laser at RF Discharge Excitation
     射频激励铜离子激光器的功率消耗
短句来源
     In scientific research and engineering application, it needs an accurate and convenient method to measure the power dissipation of the discharge device in order to have accurate evaluation on the efficiency of ozone generator.
     在科研及工程应用中,为及时准确的评价臭氧发生器的转换效率,需要一种准确、方便的方法测量放电装置的功率消耗
短句来源
     At present, some hardware-based implementation of IPSec can not satisfy the demands of maximum operation frequency, high speed (throughput), chip area and power dissipation.
     虽然目前已有不少IPSec的硬件实现,但是并没有综合考虑速度(吞吐量)、最大工作频率、面积、功率消耗等性能指标的要求。
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  power dissipation
An estimate of the power dissipation is needed in order to calculate certain torques of magnetic origin in the Gravity Probe B project.
      
An approach to predicting dynamic power dissipation of coupled interconnect network in dynamic CMOS logic circuits
      
As a result, the dynamic power dissipation of one node is no longer only in relation to the signal on that node, and it also depends on signals on its neighbor nodes through coupling capacitors.
      
The design of a decimal counter with half-frequency division shows that by using the synchronous derived clock the counter has lower power dissipation as well as simpler combinational logic.
      
GA-based maximum power dissipation estimation of VLSI sequential circuits of arbitrary delay models
      
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