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high-level synthesis
相关语句
  高级综合
     High-Level Synthesis of Timing and Synchronization in I/O Communication
     I/O通讯中时序和同步的高级综合
短句来源
     Using High-Level Synthesis For FPGA Design
     利用高级综合进行FPGA设计
短句来源
     The Improvement of Algorithm for the High-Level Synthesis of Designs with Complex Control Flow
     控制流密集型设计的高级综合算法改进
短句来源
     A Study on Register Merging Problem for High-level Synthesis
     高级综合中寄存器合并问题的研究
短句来源
     With the development of VLSI technology, it is necessary to design chip under the help of HDL (Hardware Design Language) and HLS (High-Level Synthesis).
     随着超大规模集成电路的发展,借助于硬件描述语言(HDL)与高级综合(HLS)进行芯片设计已势在必行。
短句来源
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  高层次综合
     A Study on High-Level Synthesis Algorithm and Software in the New Theory of High-Speed ASIC
     高速ASIC设计新理论中的高层次综合算法及软件研究
短句来源
     We also discuss such concepts as P and NP, approximate algorithm performance, and ascribe problems of high-level synthesis to combinational problem.
     文中在讨论了P与NP问题、近似算法性能指标等概念的基础上,对高层次综合中的问题,将其归结为基本组合问题,并进行了描述。
短句来源
     For a n-bit number, with an appropriate algorithm and high-level synthesis design method, it can be computed only by using 2n+ log2n -3 bits Registers and a Comparator in n/2 clocks.
     对一个n比特二进制数,本文采用合适的算法和高层次综合设计方法,仅用2n+[log2n]-3比特寄存器和一个比较单元,即可在n/2个时钟内得到结果。
短句来源
     Control Data Flow Graph, CDFG is an intermediate representation in high-level synthesis.
     CDFG(数据控制流图)是高层次综合常用的中间表示格式。
     Research on High-level Synthesis Algorithm and the Comparison of Two Sequential Synthesis Theories in EDA
     EDA中高层次综合算法及两种时序综合理论比较研究
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  “high-level synthesis”译为未确定词的双语例句
     VHDL and High-level Synthesis
     VHDL及高层综合
短句来源
     The VHDL compiling system generates a intermediate data structure of the VHDL used by the high-level synthesis.
     系统生成VHDL源描述的中间数据结构CDFG作为VHDL高层次综合的输入。
短句来源
     This paper is about design and reaearch of the VHDL compiling system based on the subset of IEEE 1076.The VHDL compiling system is the front-end of the VHDL high-level synthesis system,it accept VHDL source description and generate a interface format used by the latter synthesis or simulation systems.
     本文是关于IEEE 1076子集的VHDL语言编译系统的设计与技术研究。
短句来源
     PTracker not only facilitates program performance measurement, but also provides users with high-level synthesis performance data. These data reflect the program's performance characteristics in memory accesses and ILP (Instruction-Level Parallelism), which are useful in helping users to analyze and optimize the program's performance.
     它不仅能够方便地获取程序性能数据,而且通过自动分析,提供反映程序在存储访问、指令级并行性(Instruction-Level Parallelism,ILP)开发方面高层次特征的综合数据。
短句来源
     After used of high-level synthesis the performance of design was improved obviously and the period of design was distinctly short.
     高级综合技术的应用可以明显地提高设计速度,缩短设计周期,从而允许设计者进行设计空间的搜索(即对数字系统进行不同方案的设计),寻求最优或满意的设计方案。
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  high-level synthesis
This paper presents a new high-level synthesis methodology, which models both, iterative loops and imperfectly nested loops, by means of the system of linear inequalities.
      
It has been known that resource sharing in high-level synthesis is one of the major synthesis tasks which greatly affect the final synthesis/layout results.
      
Resource Sharing Combined with Layout Effects in High-Level Synthesis
      
The DSP core was designed concurrently with its automatic software generator based on high-level synthesis.
      
PICO-NPA: High-Level Synthesis of Nonprogrammable Hardware Accelerators
      
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The high-level synthesis of digital system, which transform an abstract behavioral representation of digital system into a structural description of Register-transfer level under some constraints, has been shown to be a practical and efficient means of digital system design. In this paper we introduce the representation of digital system. Then we show the tasks of high-level synthesis, present the basic techniques of high-level synthesis and its development.

数字系统高层次综合是指从抽象的行为特性描述到寄存器传输级结构描述的转换。它是一种实用的、有效的数字系统设计方法。本文介绍数字系统的表示,并概括叙述高层次综合的主要任务、高层次综合技术的发展和现状以及存在的一些问题。

A new approach, called Diffusion-based scheduling algorithm for high-level synthesis, is presented. It performs scheduling and scheduling trade-off under hardware resource constraints and timing constraints. It supports the scheduling of multicycle and chained operations, functional pipelines, etc. The algorithm obtains the same or even better results compared with those obtained by the previously published algorithms in less time.

本文介绍了一个适用于高层次综合系统的、新的调度算法:基于浓度扩散的调度算法.该算法不仅可以在硬件资源(如芯片面积)约束条件下或在时间约束条件下进行调度,而且可以在这两种约束条件下进行折衷调度.它支持多周期操作与链式操作到非流水线功能部件与流水线功能部件的调度.我们的算法在较小的时间复杂度下得到了与以前发表的几种算法相似甚至更好的结果.

It is very difficult to transform an abstract behavioral specification into a structure of RTL operations and a state sequencing table. In this paper several essential problems for high levels synthesis are presented, some new methods to solve these problems, such as the environment of design conceptualization, dividing synthesis process into sev(?)ral stages, intellegent method, framework, are geven, some key issues which required further reseach in future also are listed.

本文论述了有关高级综合的几个基本问题及其解决这些问题的方法.这些方法包括:概念化环境、多级混合综合、框架结构和智能方法等.

 
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