With the increase in the speed of digital signal processor(DSP),serial and parallel ports can't meet the demand of high-speed data transmission between computer and high-speed DSP. A system on the basis of TMS320C5402 and CY7C68013 is presented.
The software part is implemented by using Visual Basic 6.0 and Visual C++ platforms,and the hardware signal processing circuit board is completed by FPGA. The communication of software and hardware is realized via the high speed parallel ports.
Compared to the digital communicational system based on the SPP and RS232 ports, improved digital communicational system based on parallel ports (EPP) has higher digital communicational speed.
The poor performance of serial communication has been an issue in the industry for a while,and FT245BM chip can exchange the protocols between USB ports and parallel ports. This papers introduces the basic principles and functions of the FT245BM chip, and also presents the application design based on FT245BM interface circuit, the assembler based on 89C52, and the source code of c51 single chip microprocessor.
The poor performance of serial communication has been an issue in the industry for a while,and FT245BM chip can exchange the protocols between USB ports and parallel ports.
The C8051F120 chip is adopted in the FCS, which is a high-speed high-performance mixed-signal System-on-a-Chip MCU. The communication of FCS is composed of multi-serial ports(such as RS422 and CAN) and parallel ports based on dual-port SRAM.
This paper, on the basis of describing the modes of microcomputer r parallel ports,introduces in a emphasis way the PS/2, EPP, ECP as well as its practicibility.
In this paper,A simple,new method for driving dynamic LCD display is presented. Furthermore,we can use general device with ordinary parallel ports to drive complicated dynamic LCD display with multiple common back electrodes.
This paper discusses such problems as range estimation,parameter calculation and hardware structure of signal processing subsystem in 8mm battlefield reconnaissance. A radar range formula is given which combines coherent integration and non - coherent integration for range estimation. Signal processing algorithm is realized by means of a pipelining structure. Based on this structural feature, the hardware in this subsystem is composed of 6 ADSP 21060 digital signal processor chips which are connected in a c...