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error detecting code     
相关语句
  检错码
     Therefore, many ways to improve the reliability of the monitoring system have been studied, such as enlarging the bandwidth, enhancing the power, reducing the noise, or using the error detecting code and error correcting code, etc.
     为此,人们研究了很多种提高监测系统通信可靠性的方法,比如,增加带宽、加大功率、降低噪声、使用数据检错码或数据纠错码等。
短句来源
  纠错码
     Therefore, many ways to improve the reliability of the monitoring system have been studied, such as enlarging the bandwidth, enhancing the power, reducing the noise, or using the error detecting code and error correcting code, etc.
     为此,人们研究了很多种提高监测系统通信可靠性的方法,比如,增加带宽、加大功率、降低噪声、使用数据检错码或数据纠错码等。
短句来源
  “error detecting code”译为未确定词的双语例句
     Error Detecting Code for Drum
     磁鼓编码与校验
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  error detecting code
The functional logic provides output encoded with an error detecting code and the checker determines if the output is a codeword.
      
This latter system uses an error detecting code such as the one described in Section II-B and retransmits corrupted words.
      
On the other hand, we assume the system contains a CRC error-detecting code.
      
Furthermore, a decision on a repeat request can be based on the bit error probability instead of an error detecting code.
      


Byte error correcting codes are demanded in byte-oriented systems such as main memory, data transfer path, etc.. In this paper a class of single byte error correcting double byte error detecting codes (Sb/EC Db/ED codes) generated by means of the recursive process is presented. If the byte length is b, the length of checking part of the code is m bytes, the length of information part of the code is k bytes, then the maximal code length will be n=m+k=2m-2 (2b-1+1)...

Byte error correcting codes are demanded in byte-oriented systems such as main memory, data transfer path, etc.. In this paper a class of single byte error correcting double byte error detecting codes (Sb/EC Db/ED codes) generated by means of the recursive process is presented. If the byte length is b, the length of checking part of the code is m bytes, the length of information part of the code is k bytes, then the maximal code length will be n=m+k=2m-2 (2b-1+1) bytes. In case of b= 1, these codes are the same with the ordinary binary Hamming SBC DED codes. Furthermore, another class of Sb/EC Db/BD rotation codes is produced with a computer. The length of such a code is longer than that of the previous one as the length of the checking part is increased.

对于面向字节组织的系统,如存储器、数据传输通路等,为了提高系统可靠性,需要采用能校正字节错的纠错码。本文提出一种用递归方法形成的单字节错校正双字节错检测码(S_bEC/D_bED码)。设字节长度为b位,该代码的校验部分长度为m字节,信息部分长度为k字节,则最大代码长度为n=2~(m-2)(2~(b-1)+1)字节。在b=1的特殊情况下,即为一般二元海明SEC/DED码。此外,用计算机推导出一种S_bEC/D_bED旋转码,这种码随校验部分长度的增加,具有比前一种码更大的代码长度。

In this paper we present a new type of hybrid ARQ scheme which uses a convolutional code and a Viterbi decoder for error-correcting and uses a high rate block code for error-detecting. It can offer significant advantages over both pure block code hybrid ARQ scheme and pure convolutional code hybrid ARQ scheme since it uses a Viterbi decoder to solve the complexity problem of decoding and uses a high rate block error-detecting code to solve the overhead...

In this paper we present a new type of hybrid ARQ scheme which uses a convolutional code and a Viterbi decoder for error-correcting and uses a high rate block code for error-detecting. It can offer significant advantages over both pure block code hybrid ARQ scheme and pure convolutional code hybrid ARQ scheme since it uses a Viterbi decoder to solve the complexity problem of decoding and uses a high rate block error-detecting code to solve the overhead problem of the pure convolutional code scheme.The hybrid ARQ in selective-repeat mode is analyzed for a binary symmetric channel. A lower bound on the throughput efficiency for any finite size of receiver buffer is obtained. An upper bound on the error probability is also obtained. This scheme is suitable for error control in satellite communication systems where data rate is high and round-trip delay is substantial.

本文介绍一种新型混合ARQ体制。利用一个高速率分组码进行检错,利用一个1/2速率的卷积码和Viterbi译码器进行纠错。和纯ARQ方案及仅用卷积码的混合ARQ方案相比有如下优点:由于采用卷积码和Viterbi译码器纠错而解决了分组译码器的复杂性,由于用高速率分组码检错而解决了仅用卷积码的混合ARQ方案的效率不高的问题。对二元对称信道下,与选择重传型ARQ相组合的方案的性能进行了分析。得到了任意有限接收缓存器下通过率的下限公式。本方案特别适用于卫星通信系统的差错控制,其数据率高,往返时间长。

This paper presents the sufficient conditions for the constant weight codes which can meet the Johnson's upper bound and for the existence of the optimal constant weight error-detecting codes.

本文提出达到Johnson上界的等重码和最佳等重检错码存在的一些充分条件。

 
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