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output combinational
相关语句
  输出组合
     Using two dimensional Walsh-Hadamard Transform performance of probability of errors caused by soft noise for general multiple output combinational logic systems is analyzed. Simplified equations and a fast new algorithm for computing the probability of errors caused by soft noise to some specific cases and the general case, the SUMof-PRODUCT and NAND-NAND model are obtained.
     本文运用两变量沃尔什-阿达马变换分析了一般多输出组合逻辑系统因软故障引起的系统错误概率,导出了计算某些特殊情况及常用的SUM-OF-PRODUCT和NAND-NAND系统错误概率的简化公式和快速算法。
短句来源
  “output combinational”译为未确定词的双语例句
     A STUDY ON THE MULTI-LEVEL PROGRAMMING AFTER MINIMIZATION OF MULTIPLE OUTPUT COMBINATIONAL LOGIC
     多输出组合逻辑化简后的多级化程序研制报告
短句来源
     NOISE ANALYSIS OF SOFT ERRORS IN MULTIPLE OUTPUT COMBINATIONAL LOGIC SYSTEMS
     多输出组合逻辑系统中软故障的分析
短句来源
     AN IMPROVEMENT ALGORITHM OF CAD SOFTWARE OF MULTIPLE OUTPUT COMBINATIONAL LOGIC TWO STAGE CIRCUIT
     综合多输出组合逻辑二级电路CAD软件算法的改进
短句来源
     It can implement PLA's design of multiple output combinational logic func-tion with a total of thirty-two input and output variables.
     它以逻辑函数作为输入数据,先后进行逻辑综合、PLA折迭以及自动生成版图的制版源程序.
短句来源
     Several examples has been considered by the use of computer codes. It reveals the characteristics of the probability of errors caused by soft noise and provides some useful prompt for the design of multiple output combinational logic systems.
     利用计算机研究了几个实例,它们揭示了由软故障引起的系统错误概率的特征,为设计多输入多输出组合逻辑系统,降低软故障对系统的影响,提供了有益的启示。
短句来源
  相似匹配句对
     SELF-CHECKING OF MULTI-OUTPUT COMBINATIONAL CIRCUITS
     多输出组合电路的自检测
短句来源
     The reproductive output of R.
     桃金娘的生殖产量与其所受的光照强度有很大的关系。
短句来源
     Combinational Logic
     组合逻辑
短句来源
     Cost and output;
     成本与产出的关系;
短句来源
     A Transition Count Testing of Multi - output Combinational Logic Circuits
     多输出电路跳变次数(TC)测试算法
短句来源
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  output combinational
Experimental Results for Self-Dual Multi-Output Combinational Circuits
      
It is shown that for a two-level irredundant single/multiple output combinational circuit, the checkpoints consist of all primary inputs without fanout, and all fanout branches in the circuit.
      
The circuit is partitioned into three parts, the input and output combinational logic and the memory.
      
Given a multiple-output combinational circuit, a parity bit signature is generated by first EXORing all the outputs to produce a new output function and then feeding this resulting function to a single-output parity bit signature generator.
      
Synthesis of multiple-output combinational networks using multiplexors
      
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A general method for detecting the errors of multi-output combinational circuits having fanouts is presented. The output, errors of any combinational circuit can be predicted and the resulting circuit can be designed so that it is totally self-checking with respect to any single stuck-at-fault.

本文叙述了对于有扇出的多输出组合电路进行误差检测的一般方法,详细地讨论了这种方法的误差检测特性,任何组合电路的输出误差都可预测,因而整个电路可设计成对于任何单固定故障为完全自检的。

For switching functions with multiple output,this paper discusses the input-output method,data structure of the cubes,and computer implementation of the #-product operation,and presents a partitioned method of reduction to eliminate the redundant cubes.The computational effort of such a method is reduced to a third as compared with the traditional.In this paper,the cover-most algorithm is improved into a method of solving the covering problem for the multiple-output switching functions,the solution so obtained...

For switching functions with multiple output,this paper discusses the input-output method,data structure of the cubes,and computer implementation of the #-product operation,and presents a partitioned method of reduction to eliminate the redundant cubes.The computational effort of such a method is reduced to a third as compared with the traditional.In this paper,the cover-most algorithm is improved into a method of solving the covering problem for the multiple-output switching functions,the solution so obtained is near the minimum one,and the associated computational time is available.Finally,an algorithm that reduces the two-level multiple-output combinational logical functions is organized,based on the methods stated above,and some examples are given in FORTRAN,adapted for use on system FELIX C-512.

本文对于多输出函数,讨论多维体的数据结构、输入,输出方法以及锐积(#)运算在计算机上的实现,给出锐积蕴涵化简的分组化简法,共计算量仪是不分组时的三分之一,甚至更少。文中将覆盖最多点法扩展、改进成为求解多输出函数覆盖问题的方法,能得到一个接近最小造价的解,在时间和最小性方面都切实可行,并可用于PLA的程序设计。最后,利用上述方法组成一种化简两级多输出组合逻辑函数的算法,并给出在FELIX C—512机上用FORTRAN程序实现的几个例子。

This paper presents an automatic design system for programmable logic array(PLA).It can implement PLA's design of multiple output combinational logic func-tion with a total of thirty-two input and output variables.The design task consists ofthree procedures, i.e.logic simplification-synthesis,topological design-fold,and phy-sical design-mask pattern generation.Two mapor procedures and some results are in-troduced in detail.First,a neww modified folding algorithm is described,and two me-thods,the...

This paper presents an automatic design system for programmable logic array(PLA).It can implement PLA's design of multiple output combinational logic func-tion with a total of thirty-two input and output variables.The design task consists ofthree procedures, i.e.logic simplification-synthesis,topological design-fold,and phy-sical design-mask pattern generation.Two mapor procedures and some results are in-troduced in detail.First,a neww modified folding algorithm is described,and two me-thods,the folding factor method and the cross filding method aiming at improving thefolding efficiency are presented.Second,the method of mask pattern generation forbipolar layout of PLA is presented.Finally,some results of the examples are lited.

本文提出了一个可编逻辑阵列(PLA)的自动设计系统.它以逻辑函数作为输入数据,先后进行逻辑综合、PLA折迭以及自动生成版图的制版源程序.适用于多输出函数组合逻辑电路的设计,能够处理的输入变量和输出变量总数最多为32.文中对系统的两个主要部分作了介绍.首先,叙述了一种改进的折迭算法,提出了用以提高折迭效率的折迭参数法和交叉拆迭法,并介绍了完整的折迭过程.其次,叙述了版图自动生成的方法以及按照双极型工艺实现版图生成的过程.最后给出了本系统运行的若干结果.

 
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