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evaluation circuit
相关语句
  评估电路
     Design of Evaluation Circuit for a CMOS Standard cell Library
     一种CMOS标准单元库的评估电路设计
短句来源
  “evaluation circuit”译为未确定词的双语例句
     The evaluation circuit is specifically designed and manufactured for X1525,a PWM IC,and it can also be used for evaluating reliability of othertypes of bipolar IC’s.
     通过微电子测试图形对工艺的控制检测,和单机理失效的评估来对X1525的可靠性进行评价。 该电路也适用于一般的双极IC的可靠性评估。
短句来源
  相似匹配句对
     On Evaluation
     论“评价”
短句来源
     On Evaluation
     评价论
短句来源
     Analysis and Evaluation of Microwave Mixer Circuit Performances
     微波混频器电路性能的分析与评估
短句来源
     Evaluation of Short Circuit Welding Process Stability
     弧焊短路过程稳定性评价
短句来源
     Directed D-Circuit
     有向D-回路
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  evaluation circuit
Respiratory gas exchange and physiological demands during a fire fighter evaluation circuit in men and women
      
The sensor chip is connected with wire bonds to this evaluation circuit.
      
The next step of integration would be the integration of sensing element and the evaluation circuit onto a microcontroller.
      
The evaluation circuit amplifies the signal to a calibrated 5 V output.
      
Therefore, the MUT has to be partitioned into sub-modules which are linked by a common evaluation circuit.
      
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A test chip used to evaluate the reliability of pulse-width-modulator IC’s as well as their fabrication process is described in the paper.The evaluation circuit is specifically designed and manufactured for X1525,a PWM IC,and it can also be used for evaluating reliability of othertypes of bipolar IC’s.Various kinds of microelectronic test patterns,units for evaluating single failure mode and macro circuits are introduce.

本文介绍一种评价脉宽调制器可靠性和工艺控制水平的评估电路设计。它是针对X1525脉宽调制器的小批量试制和贯标而设计的。通过微电子测试图形对工艺的控制检测,和单机理失效的评估来对X1525的可靠性进行评价。该电路也适用于一般的双极IC的可靠性评估。文章给出了多种微电子测试图形及单机理评估电路和单元评估电路。

The design idea for evaluation circuit is introduced.The test chains for unit load delay,fanout delay,wire load delay,flip flop delay,and the highest frequency are designed.The circuit structure and layout form for evaluation circuit——HS900EC are presented.

介绍了一种 C M O S标准单元库评估电路的设计思想, 分别就单元延迟参数、扇出延迟特性、线负载延迟特性、触发器延迟特性、最高振荡频率等参数设计了相应的测试链, 给出了评估电路总的结构形式和版图。

Based on the operating mechanism of intrinsic evolvable hardware(EHW),a relative platform implemented with virtual reconfigurable circuits(VRC) is discussed.This platform is composed of population memory,fitness evaluation circuits,crossover and mutation circuits,and evolvable object circuits.VRC is an array of Configurable Functional Blocks(CFB).By using the multiplexers,the routings of the circuits in CFB can be created effectively.Based on this platform,we have designed and implemented...

Based on the operating mechanism of intrinsic evolvable hardware(EHW),a relative platform implemented with virtual reconfigurable circuits(VRC) is discussed.This platform is composed of population memory,fitness evaluation circuits,crossover and mutation circuits,and evolvable object circuits.VRC is an array of Configurable Functional Blocks(CFB).By using the multiplexers,the routings of the circuits in CFB can be created effectively.Based on this platform,we have designed and implemented an experiment of 1 bit adder,and proved the validity of the method

在讨论内进化演化硬件运行机制的基础上,详细介绍了基于虚拟可重构电路(VRC)的演化硬件平台的实现方法及演化平台的组成,描述了可重配置功能块(CFB)组成的阵列及CFB之间通过多路选择开关电路建立信号传输通道。在此基础上进行了1位全加器的演化,证明了这种方法的有效性。

 
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