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data storage block
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  数据存储模块
     The article summarizes that the FPGA based logic analysis instrument uses the programmable logic device ACEX1K30TC144-3 as its controlling core,which is integrated into the electric recuperated block,data collected block,data processing block,data storage block,and signal output block, etc.
     基于FPGA的逻辑分析仪是以可编程逻辑器件ACEX1K30TC144-3为控制核心,由输入电平调理模块、数据采集模块、数据处理模块、数据存储模块、信号输出模块等组成。
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  相似匹配句对
     Linear Block Codes in Holographic Data Storage
     全息存储中的线性分组码
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     Data storage of HIS
     医院信息系统的数据存储
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     Data Storage of the PDGIS
     配电网地理信息系统的数据存储
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     DATA
     数据
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     Block and Z.
     B lock和Z.
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The article summarizes that the FPGA based logic analysis instrument uses the programmable logic device ACEX1K30TC144-3 as its controlling core,which is integrated into the electric recuperated block,data collected block,data processing block,data storage block,and signal output block, etc.,with the data collected block,data processing block and data storage block all being realized by programmable logic device inner part.The availability of the data storage block...

The article summarizes that the FPGA based logic analysis instrument uses the programmable logic device ACEX1K30TC144-3 as its controlling core,which is integrated into the electric recuperated block,data collected block,data processing block,data storage block,and signal output block, etc.,with the data collected block,data processing block and data storage block all being realized by programmable logic device inner part.The availability of the data storage block makes the use of the RAM IP inner part of FPGA effective to increase the system's processing speed and reliability.The speed-rate of sampling is up to 1 MHz,and storage depth 1 k.The system's hardware electric circuit is of high quality.The stability is therefore guaranteed.The signals of 8 channels output of the logic analysis instrument can be shown in the oscilloscope at the same time,and the waveform is very clear and stable.

基于FPGA的逻辑分析仪是以可编程逻辑器件ACEX1K30TC144-3为控制核心,由输入电平调理模块、数据采集模块、数据处理模块、数据存储模块、信号输出模块等组成。数据采集模块、数据处理模块和数据存储模块全部由可编程逻辑器件内部实现,其中数据存储模块有效地利用了FPGA内部的RAMIP核,提高了系统的工作速度及可靠性。系统的采样速率最高可达1MHz,存储深度为1k。系统的硬件电路精炼,稳定性好。逻辑分析仪输出到示波器上同时显示被测的8路信号,十分清晰、稳定。

 
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