助手标题  
全文文献 工具书 数字 学术定义 翻译助手 学术趋势 更多
查询帮助
意见反馈
   combinational logic 在 数学 分类中 的翻译结果: 查询用时:0.009秒
图标索引 在分类学科中查询
所有学科
数学
无线电电子学
计算机硬件技术
电力工业
计算机软件及计算机应用
物理学
互联网技术
更多类别查询

图标索引 历史查询
 

combinational logic
相关语句
  组合逻辑
    SDT Algorithm for Diagnosis of Combinational Logic Networks
    诊断组合逻辑网络的SDT算法
短句来源
    A Study of the Implication and the Input of LSI Combinational Logic Circuit
    大规模组合逻辑集成电路蕴含与输入的研究
短句来源
    MSI COMBINATIONAL LOGIC DESIGN UTILZING REDUCED-DIMENSION MAP
    用降维图设计MSI组合逻辑
短句来源
    Large-scale Combinational Logic IC of K-type Architecture
    K式结构大规模组合逻辑集成电路
短句来源
    I herein propose the conception of Boolean orientable difference and the path along with Boolean Difference, in the meantime, taking this proposition as a basis I am trying to establish the algorithm of combinational logic network fault diagnosis test sets.
    本文作者提出布尔方向差分和沿通路布尔差分的概念,并以此为基础建立一种组合逻辑网络故障诊断测试集的算法。
短句来源
更多       
  “combinational logic”译为未确定词的双语例句
    A DECOMPOSITION METHOD FOR SIMPLIFYING COMBINATIONAL LOGIC DESIGN BASED ON BOOLEAN EQUATION
    一个基于布尔方程的简化组合逻辑设计的分解方法
短句来源
    HAZARD IDENTIFICATION IN COMBINATIONAL LOGIC CIRCUITS
    组合逻辑线路的冒险识别
短句来源
    A New Afethod for Fault Testing in Combinational Logic Circuits
    用布尔差分求组合逻辑线路故障测试码的一种新方法
短句来源
    A Rapid Method for Generating Complete Test Sets for Combinational Logic Circuits
    快速产生组合电路初始输入引线完全测试集的一个算法
短句来源
    Dynamic Max—covering Method for Simplifying Combinational Logic Functions
    组合逻辑函数化简的动态极大复盖法
短句来源
更多       
查询“combinational logic”译词为用户自定义的双语例句

    我想查看译文中含有:的双语例句
例句
为了更好的帮助您理解掌握查询词或其译词在地道英语中的实际用法,我们为您准备了出自英文原文的大量英语例句,供您参考。
  combinational logic
Novel scalable SoC architectures based on simple combinational logic are proposed to eliminate dedicated multipliers with at least $10 \times$saving in hardware resource.
      
One of the major factors which contribute to the power consumption in CMOS combinational logic circuits is the switching activities in the circuits.
      
By reducing the number of binary inputs to combinational logic and merging algorithm steps, the strategy creates new simplified functions to decrease logic depth and area.
      
The synchronization of internal computations is achieved by balancing inherent RC delays of combinational logic elements, thus allowing circuits to be pipelined at a very fine-grain level.
      
Functional Fault Equivalence and Diagnostic Test Generation in Combinational Logic Circuits Using Conventional ATPG
      
更多          


In accordance with Doolean Difference we have in many documents put out the algorithm of the complete test sets. Its prominnet features are the clarity and precision of deduction, However its shortomings are: (1). The accurate value we obtained when there is no fault between test code and the combinational logic network cannot be decided immediately; (2). High Complexitg of computation exists and especially in the structure of the reconverging fan-out.I herein propose the conception of Boolean orientable...

In accordance with Doolean Difference we have in many documents put out the algorithm of the complete test sets. Its prominnet features are the clarity and precision of deduction, However its shortomings are: (1). The accurate value we obtained when there is no fault between test code and the combinational logic network cannot be decided immediately; (2). High Complexitg of computation exists and especially in the structure of the reconverging fan-out.I herein propose the conception of Boolean orientable difference and the path along with Boolean Difference, in the meantime, taking this proposition as a basis I am trying to establish the algorithm of combinational logic network fault diagnosis test sets.I believe the couple of the shortcomings mentioned above can be overcome.

许多文章利用布尔差分的概念建立故障完全测试集的算法。其优点是推导清晰严谨,但其缺点是,一、所求得的测试码对应组合逻辑网络无故障时的正确输出值不能立即确定。二、计算复杂性高,特别对扇出再收敛型结构更为如此。本文作者提出布尔方向差分和沿通路布尔差分的概念,并以此为基础建立一种组合逻辑网络故障诊断测试集的算法。上述两个缺点可以克服。

In this paper the dynamic behaviors for Combinational logic circuits are investigated, the algebraic structures related to various hazards are set up, a new and systematical approach to identify hazards is proposed. It not only points explicitly out all transient input assignments to make the output of the logic networks to produce static o-hazard, static 1-haz-ard, dynamic step-down hazard, and dynamic step-up hazard, but also causes the number of transient input assignments which are needed to...

In this paper the dynamic behaviors for Combinational logic circuits are investigated, the algebraic structures related to various hazards are set up, a new and systematical approach to identify hazards is proposed. It not only points explicitly out all transient input assignments to make the output of the logic networks to produce static o-hazard, static 1-haz-ard, dynamic step-down hazard, and dynamic step-up hazard, but also causes the number of transient input assignments which are needed to be verified for differentiating a kind of hazard to reduce considerably. This technique could be easily implemented in a computer program.

本文研究了组合逻辑线路的动态特性,建立了与各种冒险相关联的代数结构,提出了一个识别冒险的新的、系统的方法。该方法不仅明确地指出使网络输出产生静态0—冒险,静态1—冒险,动态负跳冒险和动态正跳冒险的所有瞬变输入赋值,而且使判定一种冒险需要验证的瞬变输入赋值的数目大大减少,易于计算机程序实现。

In this paper a new algorithm for diagnosis of combinational logic networks is proposed. It has property of that the sequential testing is carried out together with the test generation according to the structure of combinational logic networks. The algorithm is called SDT (sequential diagnostic tree) algorithm.

本文提出诊断组合逻辑网络的一种新算法。其特点是根据组合逻辑网络的结构,将产生测试码与时序测试过程统一起来进行。使算法的复杂性大大降低。这种算法称为S D T(sequential fiagnostic tree)算法。

 
<< 更多相关文摘    
图标索引 相关查询

 


 
CNKI小工具
在英文学术搜索中查有关combinational logic的内容
在知识搜索中查有关combinational logic的内容
在数字搜索中查有关combinational logic的内容
在概念知识元中查有关combinational logic的内容
在学术趋势中查有关combinational logic的内容
 
 

CNKI主页设CNKI翻译助手为主页 | 收藏CNKI翻译助手 | 广告服务 | 英文学术搜索
版权图标  2008 CNKI-中国知网
京ICP证040431号 互联网出版许可证 新出网证(京)字008号
北京市公安局海淀分局 备案号:110 1081725
版权图标 2008中国知网(cnki) 中国学术期刊(光盘版)电子杂志社