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combinational logic
相关语句
  组合逻辑电路
    On the Design about Un-inversion Variable Input of Combinational Logic Cricuit
    组合逻辑电路的无反变量输入设计
短句来源
    A special testing sequence input is need for measuring maximum dyna- mic current of a combinational logic circuit.
    组合逻辑电路的最大动态电流测试应在电路的原始输入端施加一个特定的测试序列才能实现.
短句来源
    In this paper,we have not only expressed the consideration of design about un-iversion variable input of combinational logic cricuit,but also given the method and steps by designing same special example.
    本文阐述了组合逻辑电路无反变量输入的设计思想,并通过设计实例给出了具体的设计方法与步骤.
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  combinational logic
Novel scalable SoC architectures based on simple combinational logic are proposed to eliminate dedicated multipliers with at least $10 \times$saving in hardware resource.
      
One of the major factors which contribute to the power consumption in CMOS combinational logic circuits is the switching activities in the circuits.
      
By reducing the number of binary inputs to combinational logic and merging algorithm steps, the strategy creates new simplified functions to decrease logic depth and area.
      
The synchronization of internal computations is achieved by balancing inherent RC delays of combinational logic elements, thus allowing circuits to be pipelined at a very fine-grain level.
      
Functional Fault Equivalence and Diagnostic Test Generation in Combinational Logic Circuits Using Conventional ATPG
      
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In this paper the writer tries to integrate the design of asynchronos counters of arbitrary carry system with the design of combinational logic circuits in concept and method. Here in, for the clock pulse configuration of flip-flops in asynchronous eounters of arbitrary carry system and for the solution of drive equation a concise method is established.

本文试图把时序逻辑电路和组合逻辑电路的设计,在概念上和方法上统一起来。对任意进制异步计数器中各触发器时钟脉冲的接法以及驱动方程的求解,建立一种简明的方法,以便在数字系统的实际工程设计中应用。

A special testing sequence input is need for measuring maximum dyna- mic current of a combinational logic circuit.The algorithm proposed in this paper could be used to generate testing sequence quickly,which is independent to the number of input variables in the circuit.

组合逻辑电路的最大动态电流测试应在电路的原始输入端施加一个特定的测试序列才能实现.文中提出一种算法模式可以快速生成所需的测试序列.算法与电路的原始输入端数无关.

In this paper,we have not only expressed the consideration of design about un-iversion variable input of combinational logic cricuit,but also given the method and steps by designing same special example.

本文阐述了组合逻辑电路无反变量输入的设计思想,并通过设计实例给出了具体的设计方法与步骤.

 
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