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bit
相关语句
  
    VLSI 8×8bit CMOS Multiplier
    VLSI 8×8CMOS乘法器
短句来源
    The Latest Progress in Developing 32 Bit Compacted Superminicomputer KSJ-2730
    32压缩型超级小型计算机KSJ-2730的最新进展
短句来源
    The 16 Bit A/D Conversion Circuit for Online Data Processing of Apple-ⅡMicro-computer with Colout Spectrometer
    Apple-Ⅱ微机—色谱仪联机数据处理的16A/D转换电路
短句来源
    THEORETICAL CALCULATION OF THE MAXIMUM EFFECTIVE RECORDING BIT LENGTH FOR PERPENDICULAR MAGNETIC RECORDING
    垂直磁记录最大有效记录长的理论计算
短句来源
    The Architecture of An Embedded 32 Bit RISC Microprocessor
    一种嵌入式32RISC微型计算机的体系结构
短句来源
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  “bit”译为未确定词的双语例句
    An Analysys of Bit Error Characteristics in Data Channels for Magneto-Optical Storage Systems
    磁光存储系统数据信道误码特性分析
短句来源
    The High Speed Data Acquisition System for the Bit Error Rate Testing of Magneto Optical Disks
    用于磁光盘误码率测试的高速数据采集系统
短句来源
    Master slave distributed computer system with P/V bit as multiple computer communication sign bit
    以P/V为多机通信标志位的主从分布式系统
短句来源
    Meanwhile,the way of reading and writing of the memory cell is deeply analyzed. So,the design of parameters and CR of the memory cells are researched. Finally,asynchronous FIFO of 1k×9bit is designed by technical library of 0.35μm CMOS.
    从异步FIFO的一般结构入手,重点对异步FIFO中的双端口RAM存储器进行了分析,深入研究了存储单元的读写工作原理,以此得出各单元管子参数设计的尺寸要求以及管子单元比(CR),并根据0.35μm CMOS工艺设计出了1k×9bit的异步FIFO,其读取速度约为10ns。
短句来源
    MAX3100 is a general asynchronous transceiver, having function of SPI interface and IrDA pattern. TFDU4100 is a module of series infrared transceiver which conforms to the IrDA 1.2 standard. In this paper, the SPI of ATmega8 is used to communicate with MAX3100, so the infrared bit rate can reach as high as the 115.2kbps between MAX3100 and TFDU4100. The circuit and the C language example is shown in this paper.
    MAX3100是一种具有SPI接口和IrDA模式的通用异步收发器,而TFDU4100则是符合IrDA 1.2标准的低功耗连续红外数据收发模块,本文利用ATmega8单片机的SPI接口与MAX3100进行双向通信,由MAX3100与TFDU4100相连接可实现高达115.2kbps的红外数据通讯,文中给出了硬件连接电路及C语言实例。
短句来源
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  bit
Experimental results show that the proposed approach can reduce the computational cost of full search and fast multi-block motion estimation by 80 % and 45 %, respectively, with similar visual quality and bit rate.
      
The proposed algorithm also reduces by 75 % the computational cost of the large-small mode isolation algorithm for low-motion sequence coding, and with 0.06 PSNR gain and 3.7 % reduction in bit rate.
      
In underwater acoustic communication, because the available bandwidth of the channel is severely limited, the direct-sequence spread-spectrum scheme can only be realized at low bit rates.
      
The bit error performance is correlative not only with the interference-signal ratio (ISR), the frequency offset and the phase of the CW interference sensitively, but also with the individual spread spectrum code sequence.
      
DCT_M model for excitation parameter in low bit rate vocoder
      
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053-2 Mitropro processor utilizes the PL technologies. It possesses an 8-bit word length and an instruction set including all the instructions of the Intel 8080 Microcomputer. This article has given a brief description of the design of this microprocessor. Its correctness has been Proved by using the model computer which was assembled with the small scale TTL integrated Circuits.

053—2微处理机采用I~2L工艺,字长8位,指令系统包括Intel 8080的全部指令。本文给出该微处理机的设计。已用TTL小规模集成电路组装了模型机,验证了设计的正确性。

At the present time, the newest speech processing devices are made up of bit slicespeedy microprocessors and hardware multipliers. All operations are governed by software. This paper describes a new scheme of speech processing device employ ag multiple low speed microprocessors like Intel 8080 A, 8085 or Motorola 6800, and also gives specific method of solution, based on experiments with Intel 8080A, 8085 hardware and software, to the key problems of implementation with multiple microprocessors, such as...

At the present time, the newest speech processing devices are made up of bit slicespeedy microprocessors and hardware multipliers. All operations are governed by software. This paper describes a new scheme of speech processing device employ ag multiple low speed microprocessors like Intel 8080 A, 8085 or Motorola 6800, and also gives specific method of solution, based on experiments with Intel 8080A, 8085 hardware and software, to the key problems of implementation with multiple microprocessors, such as enhancing the computing speed, communication between microprocessors and the related interfacing technique, system management, hardware and software differentiation, etc. This constitution is of value to extend speedily the use of nicroprocescors in the field of digital communication in our country. With the development of MOS microprocessors, it will be capable of competition in the long run.

目前最新的语言信号处理机都用位片式快速微处理器加硬件乘法器构成,全部操作用软件实现。本文提出了由多个速度较低的微处理器如Intel公司的8080A、8085或Motorola公司的6800构成语言处理机的方案。并且在对硬件和软件进行实验的基础上,对多机系统的一些关键问题如提高运算速度的措施、微处理器之间的通信与有关接口技术、系统的管理、硬件软件的划分等,提出了具体的方法。这种体制对于目前在国内的数字通信领域中迅速推广使用微处理器是有价值的。从长远看,随着MOS型微处理器的发展,也将会有竞争能力。

In general,the configuration of a computer arithmetic system is fixed. The word length of the arithmetic system can be quite important in terms of overall system performance,such as precision,speed and cost.For scientific computation the range of 32 to 64 bits is common,for information proce- ssing and real time control the range of 16 to 32 bits is enough.The possi- bility exists of choosing a standard word length and then providing arithme- tic operations on double or half words.This has often been done to...

In general,the configuration of a computer arithmetic system is fixed. The word length of the arithmetic system can be quite important in terms of overall system performance,such as precision,speed and cost.For scientific computation the range of 32 to 64 bits is common,for information proce- ssing and real time control the range of 16 to 32 bits is enough.The possi- bility exists of choosing a standard word length and then providing arithme- tic operations on double or half words.This has often been done to try to satisfy a wider class of users.But such arrangement can grently influence the computer power and efficiency.This is the weak point of the fixed co- nfiguration. 151-3/4 is a large-scale general-purpose high speed computer system.Its arithmetic system contains two 32-bit arithmetic units which can operate separately and concurrently.In this case,the system achieves the maximum operational speed and high reliability.In the other case,they can be conne- cted to form a 64-bit arithmetic unit,its calculation results are more accur- ate.In addition,this system allows easier reconfiguration in the case of a hardware malfunction.Therefore,the design of the reconfigurable arithmetic system of the 151-3/4 computer improves the performance of the system and solves the problem of the conflict between calculation accuracy and operating speed.The design and analysis of such system will be described and evalua- ted in this paper.

151-3/4大型计算机的变结构运算系统具有结构灵活、控制简单、可靠性高和维护方便等一系列特点。它充分发挥设备的效率,提高系统的性能,使151—3/4计算机系统能高效地广泛适应各种不同的用途。本文论述该系统的设计思想、具体结构以及有关问题的考虑,并进行性能分析。

 
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