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holding circuit     
相关语句
  保持电路
     A peak holding circuit developed by us for fast narrow pulse is introduced briefly in this paper. Amplitude of input signal is ≥50mV,rise time≤3ns,pulse width≤15ns,frequency≥20MHz,gain=3,the time of peak holding can be adjusted in the range of 400ns to 5μs.
     介绍一种适用于高速窄脉冲的峰值保持电路,该电路输入信号的幅度≥50mV、前沿≤3ns、脉宽≤15ns、频率≥20MHz、增益为3,峰展宽时间可调(0.4-5μs)。
短句来源
     The operation principles of programmable amplifying circuit, peak sampling,holding circuit and V/F converting circuit are analysed in detail and program flow graphic is also given.
     详细分析了程控放大电路、峰值采样保持电路、V/F转换电路的工作原理,并给出了程序流程图。
短句来源
     This paper analyzes the characteristic of the analog peak holding-circuit, introduces a digital peak holding circuit based on FPGA and high-speed A/D converter, and provides its simulation wave in EDA software.
     分析了模拟峰值保持器的特点,介绍了一种基于现场可编程逻辑器件FPGA与高速A/D转换器的数字式峰值保持电路,并给出了该电路的峰值采集仿真结果。
短句来源
     A small shaping amplifier and peak holding circuit
     一种小型成形放大与峰保持电路
短句来源
     A peak holding circuit for fast narrow pulse
     一种适用于高速窄脉冲的峰值保持电路
短句来源
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  保护电路
     Schottly Barrier Diode can be used as rectifying and continuous-flow unit in high frequency rectifying, switching and holding circuit, yet reducing the power consumption and circuit noise, enhancing the circuit efficiency and operation frequency.
     肖特基二极管在高频整流、开关电路和保护电路中作为整流和续流元件,可以大幅度降低功耗,提高电路效率和使用频率,减少电路噪声。
短句来源
  “holding circuit”译为未确定词的双语例句
     Design of High-Speed Digital Peak Holding Circuit Based on FPGA
     基于FPGA的高速数字峰值保持器设计
短句来源
     Therefore the data acquisition system includes mainly a multiple channel switch, a peak value holding circuit, a high speed A/D converter, a frame memory, an address generator, a sequence and logic control circuit.
     所以本系统主要包括多通道开关、峰值保持、高速 A/D、帧存储器、内地址发生器和时序及逻辑控制等几部分。
短句来源
     NEW TRANS-CONDUCTANCE PEAK HOLDING CIRCUIT
     新型跨导型脉冲峰值保持器
短句来源
     A Pipelined AD Converter Based on Fully Differentiating Dual-tunnel Sampling/Holding Circuit
     一种全差分双通道采样保持的流水线操作AD变换器
短句来源
     Basing on Faraday effect in the alternate magnetic field,a experimental device was designed for determining concentration of liquid,which consists of photo electric changer,integrated operational amplifier and peak holding circuit. With this device the relation between Field's coefficient ( α ) and concentration ( c )of Nacl water solution was obtained as follows α=α water +0.002 c
     讨论了在交变磁场作用下的法拉第效应,并利用光电转换器、集成运算放大器和峰值保持等电路设计了一套测量液体浓度的实验装置,给出了氯化钠水溶液的费尔德系数(α)与浓度(c)之间的曲线和表达式α=α水+0.002c
短句来源
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  holding circuit
The principle of this sampling holding circuit is simple and the realization of har'dware circuit is easy.
      


In this paper a 10 channel 10 bit A/D converter based on a single board com-purer SDK-85 is presented.The converted results are stored in the memory and areconvenient for display.The conversion time is adjustable between 1 ms and 15.6s.Connected with the measuring coils and holding circuits,the converter has beensuccessfully used in the measuring of the magnetic field in the Synchronous Ra-diation Light Source in our university.

本文给出了一个带有实际线路和机器指令程序的,由8085单板微处理机控制实现的10路10比特A/D 转换器.转换的结果存储在单板机的内存中,可随时给使用者提供笔录或作图.转换路数可方便地扩展到16路.整个转换过程可由外部同步脉冲启动.转换时间的可调节范围为1毫秒到数十秒.配上测量转换线圈和同步保持电路,己成功地运用于我校同步辐射加速器的磁场测量系统中.

Using the Du's transformation, the article derives the relationship between the width spectrum of rectangular pulse sequence and its synchronous sampling pulse sequence. Based on this, it arrives at the simple and easy method to solve continuous responses of digital control system with zero-order holding circuits, thus making it more convenient to analyze the system's response during successeive sampling instant.

本文应用杜氏变换,得到矩形脉冲序列的宽谱与其同步采样脉冲序列的关系,据此得到求解具有零阶保持器的数字控制系统的连续响应的简捷方法,便于分析这类常见系统在采样时刻之间的性能。

The correlative double σ sampling circuit,which is made up of operational amplifiers and used in processing the output signal of the linear charge coupled devices(CCD's),has reached up to samphng speed of 250 kHz.This cir- cuit is simple and utility.The selected rules of relative component parameters have have been discussed emphatically.These will have reference value to design high speed double σ sampling/holding circuits.

用通用运算放大器构成的用于线阵 CCD 输出信号处理的相关双σ取样电路,其取样速率可达250kHz。电路简单实用。本文着重讨论了有关元器件参数的选取原则,这对于设计高速双σ采样/保持电路有一定参考价值。

 
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