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timing diagram     
相关语句
  时序图
     First, it is analyzed the principium of HV7131E CMOS image sensor and its timing diagram, then discussed the flow process of how to collecting image, and the concrete source code is also discussed in the last part.
     首先分析了本文所用HV7131E CMOS图像传感器工作的原理和时序图,然后描述了图像采集的流程图,阐述了软件实现方法。
短句来源
     Using VHDL, three methods-iteration、array and Booth algorithm-of single precision floating point multiplier are implemented on a FPGA chip. The operation velocity is tested and compared among these three methods. The advantage of Booth algorithm is shown by using timing diagram.
     采用VHDL语言,在FPGA上实现了单精度浮点乘法器的3种算法———基本的迭代算法、阵列算法和Booth算法,并对以上3种算法的运算速度进行了测试和比较,通过时序图说明Booth算法的优越性,并根据软件测试中的判定覆盖提出了一种测试单精度浮点乘法器的方法.
短句来源
     This article introduces the sensor's characters and the compensation principle, introduces the circuit design of system, timing diagram of measurement process and the method to calculate the dew point.
     阐述这种传感器的性能特点及非线性补偿、温度补偿的原理,介绍整机电路、时序图及计算露点的方法。
短句来源
     Moreover,according to this enhanced algorithm,the author designs hardware architecture of the decoder based on the pipelined technique and gives the timing diagram.
     根据该改进算法,基于流水线设计思想,设计出硬件译码结构,给出时序图
短句来源
  “timing diagram”译为未确定词的双语例句
     With analysis PC/104 Bus timing diagram,design state machine. Then finish interface design to PC/104 Bus with CPLD in Maxplus-II.
     对PC/104总线作了时序分析,设计了状态机,使用CPLD器件完成PC/104总线的接口设计,并且在Maxplus-II环境中得到仿真验证。
短句来源
     This paper shortly introduces the function feature, pin meanings, working theory and timing diagram of MAX1246 which is a 4 - channel,serial, 12 - bit ADC.
     文章简要介绍了4通道串行12位A/D转换器芯片MAX1246的功能特点、引脚含义、工作原理及工作时序。
短句来源
     This paper shortly introduces the function feature, pin meanings, working principle and timing diagram of MAX125 which is a high speed,2 x 4-channel,simultaneous-sampling 14-bit A/D converter. It gives the interface circuit of MAX125 with single chip microcomputer.
     文章简要介绍了2×4通道同步采样14位A/D转换器芯片MAX125的功能特点、引脚含义、工作原理及工作时序,给出了MAX125与单片机的接口电路。
短句来源
     The hardware interfacing diagram and timing diagram of TLC5618A and the Micro-controller 80C196KC, TLC5618A control bits configuration, applied notice are presented. The software implement programs such as: send start signal, write a bit, write nominated address control bits and data bits, DACA and DACB outputs change at the same time are presented.
     给出了 TLC5618A 与 80C196KC 的连接图、接口时序及 TLC5618A 控制位配置和应用注意事项,以及发送起始信号、写一位、写指定地址控制位和数据位、同时改变 DACA 和 DACB等实现程序。
短句来源
     AD9481 is a 250 MHz A/D converter belongs to Analog Devices Inc.The performance of AD9481,pin,inner structure and timing diagram are introduced.
     AD9481是模拟器件公司的8位250 MHz采样率A/D转换器。
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  相似匹配句对
     DIAGRAM
     图解
短句来源
     Application of Timing Sequence Diagram in PLC Programming
     时序图在PLC编程中的应用技巧
短句来源
     At last it shows the results of synthesis and timing simulation diagram.
     最后给出了相应的综合结果和时序仿真图。
短句来源
     U-I Diagram and Its Applications
     U-I图像及其应用
短句来源
     ON TIMING OF OROGENY
     论造山运动的时间特征
短句来源
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  timing diagram
Analytical models based on the timing diagram analysis, the continuous-time Markov chain, and the randomization technique are developed to assess the proposed protocol, and are validated through event-driven simulation.
      
We represent the communication scheduling problem using a timing diagram formalism.
      
The result relies on a correlation between timing diagram and reversal bounded counter machine languages.
      
More specifically, it shows that containment of ω-regular languages generated by Büchi automata in timing diagram languages is decidable.
      
This paper presents a timing diagram logic capable of expressing certain context-free and context-sensitive properties.
      
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