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   media soc 的翻译结果: 查询用时:0.179秒
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media soc
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  媒体系统芯片
     The author of this thesis attended the project supported by National 863 Program and the development of a media SoC namely MediaSoC3221A, which is designed by the SoC R&D Group of Zhejiang University.
     本文作者参与了浙江大学信息与电子工程学系SoC R&D小组承担的国家863超大规模集成电路设计重大项目和具有自主知识产权的媒体系统芯片MediaSoC3221A设计和研发工作。
短句来源
     Media SOC Verification Framework Based on FPGA Platform
     基于FPGA平台的媒体系统芯片验证框架
短句来源
     To meet different requirements of co-simulation and co-verification,a verification framework based on FPGA platform for media SOC is proposed.
     针对媒体系统芯片的不同仿真和验证要求,提出了一种基于FPGA平台的媒体系统芯片验证框架。
短句来源
     The reuse of multimedia processor IP core is the key and difficulty of programmable media SOC design.
     媒体处理器IP核重用成为可编程媒体系统芯片设计的重点和难点。
短句来源
     The task scheduling for media SoC based DSPs includes processor task scheduling and bus task scheduling, and processor scheduling can further more be classified into global task scheduling and local task cheduling.
     对一个基于DSPs的媒体处理系统芯片而言,除了需要DSP核的相关优化设计以外,系统结构、任务分配和调度等设计问题同样非常关键。 基于DSPs的媒体系统芯片任务调度包括两类:处理器任务调度和总线任务调度,而处理器任务调度又分为全局任务调度和局部任务调度,本文对媒体系统芯片的任务调度问题展开了研究。
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  “media soc”译为未确定词的双语例句
     Research and Design of Digital Set Top Box Based on TMS320DM6446 Media SoC
     基于TMS320DM6446的数字机顶盒研究与开发
短句来源
     The programmable one is the trend of the industry with the high-speed technical development of semiconductor, microprocessor and media processing algorithms. Media SoC based on DSPs is a research hotspot in VLSI field.
     近年来,随着半导体技术和微处理器技术以及媒体处理算法(如音频、视频)不断地在发展,业界更倾向于采用基于DSP的媒体处理系统芯片结构,基于DSPs(集成多个DSP)的媒体处理系统芯片设计也成为了VLSI领域的研究热点。
短句来源
     The author of this thesis attended the project supported by National 863 Program and the development of a media SoC namly MediaSoC, which is development by the SoC R&D Group of Zhejiang University.
     本文作者参与了浙江大学信息与电子工程学系SoC R&D小组承担的国家863超大规模集成电路设计重大项目和具有自主知识产权的多媒体系统集成芯片——MediaSoC设计和研发工作。
短句来源
     Research on Physical Design of Media SoC/IP
     多媒体系统集成芯片和IP物理实现研究
短句来源
     A static time division multiplexed scheduling / dynamic fixed priority arbitration based 2-level hybrid arbitration scheme, incorporated with synchronization control, is introduced in this paper to utilize the bus bandwidth effectively and lower on-chip buffer demands in media SoC.
     提出了一种基于静态分时复用调度/动态固定优先级仲裁的混合二级总线仲裁策略,通过分割总线时间片静态调度媒体数据流DMA传输,使之与解码流程同步配合,有效地分配和使用总线带宽,降低了片上数据缓存等硬件开销。
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  相似匹配句对
     Media
     媒体互动
短句来源
     Media
     媒介
短句来源
     Soc.
     Soc.
短句来源
     SoC Platform Design for Digital Media Processing
     一种用于数字视频媒体处理的SOC平台设计
短句来源
     Media SOC Verification Framework Based on FPGA Platform
     基于FPGA平台的媒体系统芯片验证框架
短句来源
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  media soc
The core was integrated into a media SOC chip taped out in SMIC 0.18-micron technology.
      


With the development of the IC technique,SOC becomes popular as its low dispersion,low cost and high performance.The extension of media instruction on the general processor make the real-time multimedia processing algorithm based on processor possible.The reuse of multimedia processor IP core is the key and difficulty of programmable media SOC design.The paper studies the design of data paths and the communication mechanism of control information,focusing on the reuse of media processor...

With the development of the IC technique,SOC becomes popular as its low dispersion,low cost and high performance.The extension of media instruction on the general processor make the real-time multimedia processing algorithm based on processor possible.The reuse of multimedia processor IP core is the key and difficulty of programmable media SOC design.The paper studies the design of data paths and the communication mechanism of control information,focusing on the reuse of media processor IP core in media SOC.Finally,a multimedia SOC chip with typical multiprocessor architecture is shown developed by our R&D.

随着集成电路技术发展,系统集成芯片(SOC)由于低功耗、低成本、高性能等特点受到了人们的关注。通用处理器媒体指令扩展技术的发展,使得基于处理器的实时媒体处理算法成为可能。媒体处理器IP核重用成为可编程媒体系统芯片设计的重点和难点。本文围绕媒体处理器IP核在媒体系统芯片中的重用,对数据通路设计及控制信息通信机制进行研究。最后成功开发了一个典型多处理器结构的媒体集成芯片。

To meet different requirements of co-simulation and co-verification,a verification framework based on FPGA platform for media SOC is proposed.A hierarchical design method was adopted to make the software reconfigurable.Using improved bus structure method for multimedia processing,reconfigurable and reusable hardware platform was realized.A verification platform based on the framework for an audio decoder SOC has been established and 128 kbps,44.1 kHz stereo AAC LC can be decoded in real-time.

针对媒体系统芯片的不同仿真和验证要求,提出了一种基于FPGA平台的媒体系统芯片验证框架。采用层次化的方法设计软件平台,实现了软件平台的可配置性;采用面向多媒体处理的改进总线结构,实现了硬件平台的可配置和可重用性。基于提出的媒体系统芯片验证框架,快速构建了音频解码系统芯片验证平台,实现了对128 kbps,44.1 kHz立体声AAC LC的实时解码,达到了验证要求。

This work aims to design an interface control IP which can be seamlessly connected to various kinds of TFT-LCD displays.The paper firstly introduces the basic theory of the TFT-LCD interface control circuit.Then it discusses the design considerations of the control circuit including power supply.At last,it proposes a debugging and testing method using FPGA.This control circuit IP can be embedded to many kinds of multi-media SOC processor and thus owns a degree of practical and researching value.

本文意在设计能与广泛TFT-LCD显示器进行无缝连接的接口控制电路IP。论文首先论述了TFT-LCD彩屏显示驱动知识和控制原理,接着讨论了控制电路和电源电路的设计思路,最后提出了如何通过FPGA进行原型验证和调试。这块控制电路IP可植入各种多媒体处理器的SOC中。

 
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