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three essential circuit elements
相关语句
  电路三要素
     By analyzing the principle of 2-5 mixed-valued coding,the theory of three essential circuit elements and the theory of N+1-valued algebra,the 2-5 mixed-valued gate circuits,flip-flops and up-down counters with carry/borrow bit are investigated quantitatively,the 2-5 mixed-valued/ten-valued encoder is designed in order to make the output of counter become ten-valued signal.
     通过对2-5混值编码原理、电路三要素理论和N+1值代数理论的分析,定量研究了2-5混值门电路、触发器和带进位/借位的加减法计数器,最后设计了2-5混值/十值译码电路,使计数器输出为十值信号。
短句来源
     Research of 2-5 Mixed-Valued/Ten-Valued Counter Based on Three Essential Circuit Elements
     基于电路三要素理论的2-5混值/十值计数器研究
短句来源
     A universal synthesis of the bipolar ECL circuits in component level is presented,based on the theory of three essential circuit elements.
     在电路三要素(信号,网络和负载)理论的基础上提出双极型ECL元件级电路通用综合方法,并依此理论设计出一种新型低压ECL或与门电路。
短句来源
     THEORY OF THREE ESSENTIAL CIRCUIT ELEMENTS AND FAILURE ANALYSIS OF BOOLEAN ALGEBRA
     电路三要素理论和布尔代数失效原因分析
短句来源
     To design a low-power timer,an adiabatic flip-flop is designed using the clocked transmission gate adiabatic logic circuit. Based on an analysis of the timer structure on the C54_X,a new design scheme of an adiabatic timer is presented using the theory of three essential circuit elements for adiabatic circuits and the characteristics of the clocked transmission gate adiabatic logic circuit and its adiabatic flip-flop.
     为了设计低功耗定时器,首先利用钟控传输门绝热逻辑电路设计绝热触发器,然后在分析C54X的定时器结构基础上,利用绝热电路三要素理论,结合钟控传输门绝热逻辑电路及其绝热触发器的特性,提出绝热定时器的设计新方案。
短句来源
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  电路三要素理论
     By analyzing the principle of 2-5 mixed-valued coding,the theory of three essential circuit elements and the theory of N+1-valued algebra,the 2-5 mixed-valued gate circuits,flip-flops and up-down counters with carry/borrow bit are investigated quantitatively,the 2-5 mixed-valued/ten-valued encoder is designed in order to make the output of counter become ten-valued signal.
     通过对2-5混值编码原理、电路三要素理论和N+1值代数理论的分析,定量研究了2-5混值门电路、触发器和带进位/借位的加减法计数器,最后设计了2-5混值/十值译码电路,使计数器输出为十值信号。
短句来源
     Research of 2-5 Mixed-Valued/Ten-Valued Counter Based on Three Essential Circuit Elements
     基于电路三要素理论的2-5混值/十值计数器研究
短句来源
     THEORY OF THREE ESSENTIAL CIRCUIT ELEMENTS AND FAILURE ANALYSIS OF BOOLEAN ALGEBRA
     电路三要素理论和布尔代数失效原因分析
短句来源
     To design a low-power timer,an adiabatic flip-flop is designed using the clocked transmission gate adiabatic logic circuit. Based on an analysis of the timer structure on the C54_X,a new design scheme of an adiabatic timer is presented using the theory of three essential circuit elements for adiabatic circuits and the characteristics of the clocked transmission gate adiabatic logic circuit and its adiabatic flip-flop.
     为了设计低功耗定时器,首先利用钟控传输门绝热逻辑电路设计绝热触发器,然后在分析C54X的定时器结构基础上,利用绝热电路三要素理论,结合钟控传输门绝热逻辑电路及其绝热触发器的特性,提出绝热定时器的设计新方案。
短句来源
     Design of Adiabatic Timer Based on Three Essential Circuit Elements for Adiabatic Circuits
     基于绝热电路三要素理论的绝热定时器设计
短句来源
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This paper presents a synthesis of synchronous dynamic sequential circuits (SDSC) in which capacitor is used as memory element instead of flip flop for double edge trigger.On the basis of theory of three essential circuits elements (signal,network and load),the edge sampling theorem is derived first,then a Karnaugh map method is developed from gate stage into element stage and finally the state assignment principle for CDSC is presented,so that an efficient synthetic...

This paper presents a synthesis of synchronous dynamic sequential circuits (SDSC) in which capacitor is used as memory element instead of flip flop for double edge trigger.On the basis of theory of three essential circuits elements (signal,network and load),the edge sampling theorem is derived first,then a Karnaugh map method is developed from gate stage into element stage and finally the state assignment principle for CDSC is presented,so that an efficient synthetic procedure of SDSC is formed.By the use of the synthetic procedures,we have designed some SDSC which structures are very simplified,such as that the error code detecting circuits consists of only 22 MOS transistors and 8421BCD 10 counter consists of only 31 MOS tramsisters.

本文提出用电容代替触发器作为记忆元件的双边沿同步动态时序电路(SDSC)的综合方法.基于电路三要素(信号、网络和负载)理论,首先推导出边沿取样定理;接着研究普适双边沿状态图和电路图的关系,再将卡诺图方法由门级发展到元件级;最后提出SDSC的状态编码原则,从而形成有效的SDSC的综合方法,用此方法设计了一些结构极简单的动态电路,诸如错码检测电路仅用22个MOS管,8421BCD码十进制计数器仅用31个MOS管等.

Based on a quaternary algebra, this paper presents a unified theory of ternary circuits-theory of three essential circuit elements (signal, network and load). The theory shows that a simple transform relation exists between ternary gate stage and switch stage, between ternary switch stage structures and between ternary dynamic and static circuits. Particularly, various ternary dynamic and static circuits can be deduced from the same equation.

本文基于四值代数,提出三值电路的统一理论—电路三要素(信号,网络和负载)理论,该理论表明:门级与开关级电路间,开关级电路结构间,动态与静态电路间存在简单的转换关系,依照这个关系很容易由三值函数式设计出三值电路,尤其能基于一个电路方程同时推出三值动态和静态电路。

This paper presents a theory of three essential circuit elements (signal, network and load) for surmounting failure of Boolean algebra. First, the paper analyzes the caurse of Boolean algebra failure in digital circuits. Second, on the basis of perfect digital circuits theory, a switch operater transform theorem is proved to embody all most the overwhelming majority identical equations on switch operater which was necessary to prove one by one in literatures. After that, it is shows that the...

This paper presents a theory of three essential circuit elements (signal, network and load) for surmounting failure of Boolean algebra. First, the paper analyzes the caurse of Boolean algebra failure in digital circuits. Second, on the basis of perfect digital circuits theory, a switch operater transform theorem is proved to embody all most the overwhelming majority identical equations on switch operater which was necessary to prove one by one in literatures. After that, it is shows that the unity of digital circuits exists not only between gate level and component level circuits, but also among component level circuit structures and between dyamic and static circuits. Besides, the Karnaugh map method and algebra method are presented for designing component level circuits.

本文提出一个克服布尔代数失效的电路三要素理论。文中首先分析布尔代数在数字电路中失效的原因,接着证明开关运算定理等,它概括了文献中曾需一一证明的绝大多数开关运算等式,然后表明:数字电路的统一性既存在于门级和元件级电路间,也存在于各型元件级电路结构间,以及动态与静态电路间。此外,本文提出元件级电路设计的卡诺图方法和代数方法。

 
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