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reconfigurable array
相关语句
  可重构阵列
     Based on the reconfigurable computing system, the thesis proposes RAC, a reconfigurable array coprocessor model, targeted at multimedia image applications.
     本论文基于可重构计算系统提出了针对多媒体图像处理的可重构阵列协处理器模型RAC。
短句来源
  “reconfigurable array”译为未确定词的双语例句
     Finally, the method for memory architecture design space exploration in RCA is discussed. The dissertationgives the maximum for local data memory size, configuration context memory size and the bandwidth of interface between local data memory and reconfigurable array. An algorithm with area constraint for memory architecture design space exploration is proposed, which acquires memory architecture with the best performance for application domain.
     论文讨论了存储器结构的设计空间搜索方法,研究了存储器结构中局部数据存储器容量、配置上下文存储器容量和局部数据存储器与可重构功能处理单元阵列之间的接口带宽,推导了局部数据存储器容量和配置上下文存储器容量的最大值以及局部数据存储器与可重构功能处理单元阵列之间接口带宽的最大值,最后提出了面积约束的存储器结构设计空间搜索方法,在搜索域选择性能最优的存储器结构。
短句来源
     The thesis proposes "Longtium-DSRU" (Domain Specific Reconfigurable Unit), a coarse-grained, efficient, flexible, reconfigurable array coprocessor model, targeted at multimedia applications' 3 groups of basic computation structure: FIR, FFT and dot-product.
     因此,本文面向多媒体应用领域的三种基本计算结构:FIR(Finite Impulse Response)、FFT(Fast Fourier Transform)、点积类运算,实现了一种粗粒度的、高效、灵活的片上可重构处理单元——龙腾-DSRU(Domain Specific Reconfigurable Unit)。
短句来源
     Research on Study on the Dynamically Reconfigurable Array Co-porcessor
     动态可重构协处理器研究
短句来源
     With analyzing reconfigurable array design space, the dissertation explains the algorithm to estimate area, time and power for reconfigurable array.
     论文研究了可重构功能处理单元阵列的设计空间,推导了可重构功能处理单元阵列的面积、性能和功耗的估计公式。
短句来源
     The author designed a kind of Dynamically Reconfigurable Array Coprocessor (DReAC) with the combination of these two kinds of structures. This paper is the first research on them.
     本文首次尝试了这项工作,设计了一款兼有上述两种工作模式的动态可重构协处理器——DReAC(Dynamically Reconfigurable Array Coprocessor)。
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  相似匹配句对
     Research on Study on the Dynamically Reconfigurable Array Co-porcessor
     动态可重构协处理器研究
短句来源
     Linear Array Model With Reconfigurable Optical Pipeling Bus
     基于流水光总线的可重构线性阵列模型
短句来源
     Reconfigurable Computer
     可重构计算机
短句来源
     The Mierolen Array
     微透镜阵列
短句来源
     On the Norm of Array
     关于立体阵的范数
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  reconfigurable array
In this paper a design methodology for reconfigurable array processors is described.
      
A design method for on-line reconfigurable array processors
      
Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture
      
The partitioning method is mainly composed by three steps: the analysis of the input code, the mapping onto the Coarse-Grain Reconfigurable Array and the mapping onto the FPGA.
      
Genetic Algorithms for Design of Discrete Phase-only Reconfigurable Array Antennas with Fixed Dynamic Range Ratio
      
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The fault coverage problem for reconfigurable arrays has received as constraint bipartite vertex cover problem, which is proved as a NP-complete. It can't be resolved in polynomial running time. The theory of parameterised computation is used to reduce the kernel of problem which is independent of the original problem. Furthermore, the algorithm's running time is bounded by the study for the characteristics of the bipartite graph.

对超大规模集成电路芯片 (VLSI)的缺陷修复可归结为受二分图约束的顶点覆盖问题 ,该问题属于NP完全问题 .目前仍不能在多项式时间内对该问题求解 .本文应用参数计算理论 ,将问题化简为与输入问题规模无关的问题来求解 .并利用二分图的特性 ,提出了一种简单、高效的算法 ,大大提高了修复速度

The fault coverage problem for reconfigurable arrays has received considerable attention in the literature. In particular , the minimum fault coverage problem for reconfigurable arrays is equivalent to a constrained minimum vertex cover problem on bipartite graphs and the problem has been proved to be NP-complete. This paper gives an algorithm developed for the problem,in which classical results in matching theory and recently developed techniques in the study of parameterized computation are nicely...

The fault coverage problem for reconfigurable arrays has received considerable attention in the literature. In particular , the minimum fault coverage problem for reconfigurable arrays is equivalent to a constrained minimum vertex cover problem on bipartite graphs and the problem has been proved to be NP-complete. This paper gives an algorithm developed for the problem,in which classical results in matching theory and recently developed techniques in the study of parameterized computation are nicely combined and extended. The algorithm is practically efficient with its running time bounded by O(1. I9k + kn) .where k is the minimum number of replacement rows and columns. The algorithm is a significant improvement over the previous algorithms for the minimum fault coverage problem for reconfigurable arrays with its running time bounded by O (1. 26k + kn), as well as over the related parameterized algorithms for the minimum vertex cover problem.

关于可重构阵列的瑕点覆盖问题受到了很多文献的关注,特别地,关于可重构阵列的最小瑕点覆盖问题等价于二分图的受约束最小点覆盖问题,并被证明是NP-完全问题。针对本问题提出的算法运行时间为O(1.9~k+kn),这里k为可替换行与列的数目,改进了原有的最好结果,其运行时间为O(1.26~k+kn),较好地组合并扩展了研究参数计算的最新技术与经典匹配理论,且具有较好的实用价值。这是关于可重构阵列的最小瑕点覆盖问题算法又一较大的改进,也是目前最小点覆盖问题相关参数算法的较有意义的改进。

The paper presents a run-time reconfigurable coprocessor designed for Space Solar Telescope(SST).The coprocessor provides a 4bit-width reconfigurable array,which transforms instruction-stream-based computing to data-stream-based and configuration-stream-based computing,and employs a 4-stage instruction pipeline to synchronize coprocessor and processor.The paper also gives an implementation of the coprocessor on Xilinx XC2V3000 and performance on the multiplication and the 1024 point complex Fast Fourier...

The paper presents a run-time reconfigurable coprocessor designed for Space Solar Telescope(SST).The coprocessor provides a 4bit-width reconfigurable array,which transforms instruction-stream-based computing to data-stream-based and configuration-stream-based computing,and employs a 4-stage instruction pipeline to synchronize coprocessor and processor.The paper also gives an implementation of the coprocessor on Xilinx XC2V3000 and performance on the multiplication and the 1024 point complex Fast Fourier Transform.

本文提出了一种为空间太阳望远镜星载数据处理系统而设计的动态可重构协处理器方案,该方案利用4bits粒度可重构阵列将传统的基于指令流的运算方式变为基于数据流与配置流的运算方式,并通过指令流水实现了动态可重构单元与主处理器的协同工作.文章最后还给出了该方案在Xilinx XC2V3000上的实现及该实现用于乘法和1024点复数快速傅立叶变换时的性能.

 
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