助手标题  
全文文献 工具书 数字 学术定义 翻译助手 学术趋势 更多
查询帮助
意见反馈
   circuit parallel 的翻译结果: 查询用时:0.026秒
图标索引 在分类学科中查询
所有学科
计算机硬件技术
更多类别查询

图标索引 历史查询
 

circuit parallel
相关语句
  电路并行
     Facing the challenge of design scale of VLSI becoming larger,except for circuit parallel,the existing basic parallel approaches cannot solve test generation complexity problems radically.
     面对VLSI设计规模日益增大的挑战 ,除了电路并行以外 ,其它已有的基本并行策略都无法从根本上解决测试生成的复杂性问题 .
短句来源
     However,the existing circuit parallel test generation algorithms fail get good results,especially for sequential circuit.
     然而 ,已有的电路并行测试生成算法并未取得理想的结果 ,尤其对时序电路 .
短句来源
     The experimental results on ISCAS89 reveal that,based on G-F two values and BWFSF algorithm,the circuit parallel test generation algorithm GFFCP is able to effectively decrease memory overhead while getting steady speedup.
     对Benchmark - 89电路的实验结果表明 ,基于G -F二值算法和BWFSF算法的电路并行测试生成算法在有效减少存储空间消耗的同时 ,还能够获得稳定的加速比 .
短句来源
  “circuit parallel”译为未确定词的双语例句
     Connection Improvement of Prevention Voltage Transformer Secondary Circuit Parallel Operation
     防止电压互感器二次回路并列运行的接线改进
短句来源
     For TQ we research fault parallel, search-space parallel and circuit parallel TG aPproaches.
     在TG方面,本文深入研究了基于故障分解、搜索空间分解和电路划分三种并行TG方法。
短句来源
     in order to satisfy the needs of Physical-Chemistry experiments,an idea to extend hardware of microcomputer TP-801A with interface-circuits such as Counter/Timer Circuit,Parallel Input/Output controller and Analogue/Digital Transformer ADC0809 was posed in this paper,and,schematic diagram and essential program used to achieving the idea were given.
     为满足物理化学实验需要,提出并实现了对TP-801A微机进行CTC、PIO、ADC0809等接口电路的硬件扩充.给出了电路原理图和程序清单.
短句来源
     This paper introduces the basic structure of three phase SPWM inverter and the desigh of the prime circuit,parallel buffer and drive circuit.
     介绍了三相正弦脉宽调制式变频器的基本结构 ,以及变频器主电路、并联缓冲器和驱动电路的设计。
短句来源
     The counter circuit controlling data combing time and shift circuit parallel dataconverting to serial data are both designed in CPLD. This device controlled by relevant software isframe frequency programmable device about high speed data combination and conversion. The soft-ware design is completed by C and C++.
     其中控制数据合并时间的计数器电路和并行数据转换成串行数据的移位电路都是在CPLD中形成的,并且由相应的软件控制成为帧频可编程的数据合并转换器,软件设计由C语言和C++语言来完成的。
短句来源
  相似匹配句对
     Circuit Design of Parallel Output m-sequence
     并行输出m序列的电路设计
短句来源
     Fluctuation of The Mesoscopic Parallel RLC Circuit
     介观并联RLC电路的涨落
短句来源
     On Parallel Importation
     平行进口问题探析
短句来源
     ON PARALLEL ALGORITHMS
     并行算法简介
短句来源
     S-Transformahons of S-Circuit
     S-闭迹的S-变换
短句来源
查询“circuit parallel”译词为用户自定义的双语例句

    我想查看译文中含有:的双语例句
例句
为了更好的帮助您理解掌握查询词或其译词在地道英语中的实际用法,我们为您准备了出自英文原文的大量英语例句,供您参考。
  circuit parallel
The degree of inaccuracy will depend on the circuit parallel to the measurement circuit.
      
Photograph of a realized transimpedance-cascode pin-HEMT re signal equivalent circuit parallel to the channel equivalent circuit elements.
      


The function of device about high speed data combination and conversion combinesa lot of high speed serial port data, and then converting them to PCM data scream that can display onterminal screen. The counter circuit controlling data combing time and shift circuit parallel dataconverting to serial data are both designed in CPLD. This device controlled by relevant software isframe frequency programmable device about high speed data combination and conversion. The soft-ware design is completed by C and...

The function of device about high speed data combination and conversion combinesa lot of high speed serial port data, and then converting them to PCM data scream that can display onterminal screen. The counter circuit controlling data combing time and shift circuit parallel dataconverting to serial data are both designed in CPLD. This device controlled by relevant software isframe frequency programmable device about high speed data combination and conversion. The soft-ware design is completed by C and C++.

送到终端显示器显示。其中控制数据合并时间的计数器电路和并行数据转换成串行数据的移位电路都是在CPLD中形成的,并且由相应的软件控制成为帧频可编程的数据合并转换器,软件设计由C语言和C++语言来完成的。

Facing the challenge of design scale of VLSI becoming larger,except for circuit parallel,the existing basic parallel approaches cannot solve test generation complexity problems radically.However,the existing circuit parallel test generation algorithms fail get good results,especially for sequential circuit.Therefore,how to partition circuit becomes a key to the design base and success.BWFSF algorithm partition synchronous sequential circuit to many big function blocks by backward...

Facing the challenge of design scale of VLSI becoming larger,except for circuit parallel,the existing basic parallel approaches cannot solve test generation complexity problems radically.However,the existing circuit parallel test generation algorithms fail get good results,especially for sequential circuit.Therefore,how to partition circuit becomes a key to the design base and success.BWFSF algorithm partition synchronous sequential circuit to many big function blocks by backward width-first search with flip-flop as core.The experimental results on ISCAS89 reveal that,based on G-F two values and BWFSF algorithm,the circuit parallel test generation algorithm GFFCP is able to effectively decrease memory overhead while getting steady speedup.

面对VLSI设计规模日益增大的挑战 ,除了电路并行以外 ,其它已有的基本并行策略都无法从根本上解决测试生成的复杂性问题 .然而 ,已有的电路并行测试生成算法并未取得理想的结果 ,尤其对时序电路 .因此 ,如何划分电路 ,成为电路并行算法的设计基础和成功的关键 .面向逻辑级描述的同步时序电路 ,以触发器为核的电路划分算法BWFSF将电路划分为大功能块 .对Benchmark - 89电路的实验结果表明 ,基于G -F二值算法和BWFSF算法的电路并行测试生成算法在有效减少存储空间消耗的同时 ,还能够获得稳定的加速比 .

A new double terminal method of travelling wave fault location using wavelet transform for double-circuit parallel transmission line is presented. It can effectively extract the characteristics of travelling waves and eliminate the effects of the travelling wave dispersion on the fault location accuracy. In addition, it makes the definition of arrival time and the choice of propagation velocity more reasonable. A large amount of simulation results show that the new method is accurate and reliable. The...

A new double terminal method of travelling wave fault location using wavelet transform for double-circuit parallel transmission line is presented. It can effectively extract the characteristics of travelling waves and eliminate the effects of the travelling wave dispersion on the fault location accuracy. In addition, it makes the definition of arrival time and the choice of propagation velocity more reasonable. A large amount of simulation results show that the new method is accurate and reliable. The accuracy of the method is not affected by line length, fault positions, fault types, grounding resistance, and it can meet the requirements of advanced fault location.

利用小波变换的双端行波测距新方法,可有效提取同杆并架双回线路故障行波特征并消除行波色散对定位精度的影响,同时解决了如何定义行波到达时间和选取行波传播速度的问题。大量仿真测距结果证实论文方法的测距精度基本不受线路长度、故障位置、故障类型、接地电阻大小等的影响,测距精度能在一个挡距内,满足精确故障定位的要求。

 
<< 更多相关文摘    
图标索引 相关查询

 


 
CNKI小工具
在英文学术搜索中查有关circuit parallel的内容
在知识搜索中查有关circuit parallel的内容
在数字搜索中查有关circuit parallel的内容
在概念知识元中查有关circuit parallel的内容
在学术趋势中查有关circuit parallel的内容
 
 

CNKI主页设CNKI翻译助手为主页 | 收藏CNKI翻译助手 | 广告服务 | 英文学术搜索
版权图标  2008 CNKI-中国知网
京ICP证040431号 互联网出版许可证 新出网证(京)字008号
北京市公安局海淀分局 备案号:110 1081725
版权图标 2008中国知网(cnki) 中国学术期刊(光盘版)电子杂志社