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target processor
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  目标处理器
    Results obtained show that fault sensitivity of the target processor is about 1.385 to 2.35% , and registers are more sensitive to faults than memory area do.
    试验的结果表明,目标处理器对于单粒子翻转的敏感性大约为1.38%到2.35%,且寄存器的敏感性要高于内存区。
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    They can present different views of target processor’s behaviors and help designer to find bottlenecks.
    这种方法能够从各个侧面体现目标处理器的行为,帮助设计人员发现性能瓶颈。
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    The embedded real - time operating system must be transplanted to the target processor.
    要使用嵌入式实时操作系统需将其移植到目标处理器上。
短句来源
    To obtain safe and tight WCET estimation,it is necessary to take account of the features of a target processor architecture.
    为获得安全而紧致的WCET估计,需要考虑执行程序的目标处理器的体系结构特征.
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    An SCP(source code parser) translates the assembler source codes of the target embedded software into assembler-level software models with execution time information,which simulate the target processor and software behavior during execution.
    SCP(source codeparser)将目标嵌入式软件的汇编源代码翻译为带有执行时间信息的汇编级软件模型,以此仿真目标处理器和软件的行为。
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  target processor
It provides the ability to configure the target processor within the boundary values imposed for the configuration parameters concerning the algorithm setup, the processing time and the circuit area.
      
Based on the "Golden Reference Model," an important task of the design process is to map applications, that have been described either in C++ or directly in SystemC, to the specific real-time operating system which is running at the target processor.
      
The proposed code generation technique maps data flow graph representation of a program into highly efficient machine code for a target processor modeled by instruction set behavior.
      
It also defines the structure of the machine-description database, which is queried by the code generator for the information that it needs about the target processor.
      
We propose usage of uniform, external target processor models in code generation, which describe embedded processors by means of RT-level netlists.
      
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The embedded real-time operating system play an important part in the application of embedded systems. It is a hot topic in application of embedded systems nowadays. The embedded real - time operating system must be transplanted to the target processor.μC/OS- Ⅱ is a typical, priority - based, preemptive embedded real - time multitask kernel. The problems of saving space on RAM and modification of related files by using C and ASM are discussed in the article.

嵌入式实时操作系统在嵌入式系统应用中起着非常重要的作用,是当今嵌入式系统应用的一个热点。要使用嵌入式实时操作系统需将其移植到目标处理器上。μC/OS-Ⅱ是一个典型的、基于优先级的、占先式的嵌入式实时多任务内核,为将其移植到8031上,对减少内存资源的占用,如何用C语言和汇编语言对必要的文件进行修改和补充等问题进行了分析,提出了解决方案。

With the development of integrated circuits and computer science, software and hardware of the target system become more and more sophisticated while the traditional methods of the embedded system design appear to be outdated. For complicated embedded systems, co-verification is often used to verify the system co-design, in which hardware simulator based on hardware specification is used to validate the hardware design while the processor architecture model known as instruction set simulator (ISS) is used to...

With the development of integrated circuits and computer science, software and hardware of the target system become more and more sophisticated while the traditional methods of the embedded system design appear to be outdated. For complicated embedded systems, co-verification is often used to verify the system co-design, in which hardware simulator based on hardware specification is used to validate the hardware design while the processor architecture model known as instruction set simulator (ISS) is used to interpret the target code of the embedded software, generate output, and drive the hardware. The ISS simulates the embedded software at detailed timing level for the target processor, simulating at such a low-level that it often becomes the bottleneck for hardware/software co-simulation. In this paper, a fast software simulating method is put forward, in which, an open-source RTOS is extended and hardware-simulating driver is used to build connection for the hardware/software simulator. The simulating method based on the compiled code model for the embedded software verifies the software from the system behavior level, so higher co-verification performance can be achieved. Combined the with verification method of ISS, the high-level co-verification method can achieve faster and more effective co-verification. Finally, examples of co-design and results of co-verification are presented to show the correctness of the co-verification method.

随着集成电路及计算机技术的发展,嵌入式系统设计变得越来越复杂.复杂的嵌入式系统设计,通常采用验证的手段检验系统设计的正确性,硬件验证通常是在硬件设计描述的基础上建立用于模拟硬件功能的硬件模拟器;软件验证常用的方法是建立处理器功能模型(指令集模拟器ISS),逐条解释嵌入式软件在目标机器上的执行过程,产生模拟输出,驱动外围电路(即硬件设计).指令集模拟器从底层时序关系模拟嵌入式软件在目标CPU上运行过程.对于复杂嵌入式系统设计,ISS模拟速度通常成为协同模拟瓶颈.基于RTOS的嵌入式软件快速验证方法可以有效地提高软件模拟速度,扩展RTOS功能,适应协同模拟需要,建立硬件模拟驱动,实现软件和硬件模拟器通信连接和协同模拟同步控制.基于RTOS的嵌入式软件验证方法以编译代码模型为基础,从系统行为级验证嵌入式软件功能,验证速度快.在实际应用中。该方法和ISS验证相结合,能够实现更有效、更快速的嵌入式系统协同验证.最后以几个典型硬件设计为基础,编写相应的控制软件,进行软硬件协同验证实验,实验结果数据说明该验证方法实用、有效、快速.

As an instrument working in the space, aircraft are much easy affected by single Events Effects. So to find the most easily affected area and protect them more carefully from radiation is very important. However, to predict the effects of Single Events Effects on aircraft is not an easy thing. In this paper, the fault sensitivity of some aircraft is tested by a software approach, software fault injection, which is one of the most promising test methods to evaluate the reliability of microelectronic circuit....

As an instrument working in the space, aircraft are much easy affected by single Events Effects. So to find the most easily affected area and protect them more carefully from radiation is very important. However, to predict the effects of Single Events Effects on aircraft is not an easy thing. In this paper, the fault sensitivity of some aircraft is tested by a software approach, software fault injection, which is one of the most promising test methods to evaluate the reliability of microelectronic circuit. The approach was implemented at assembly level with high efficiency assembly language, which had no effect on the target system and was very convenient. Results obtained show that fault sensitivity of the target processor is about 1.385 to 2.35% , and registers are more sensitive to faults than memory area do.

对于工作在高辐射太空中的飞行器而言,它不可避免会受到单粒子效应的影响。因此,如何预测飞行器中单粒子效应敏感区域以便加强保护措施是一件很重要的工作。但事实上,要预测单粒子效应对飞行器的影响并不容易。本文给出了一种通过纯软件来评测飞行器系统对单粒子效应的敏感程度的方法——软件故障注入法——这也是评测微电子电路可靠性极具前景的方法。该方法采用高效的汇编语言在汇编级实现,对目标系统不会造成损伤,并且使用方便。试验的结果表明,目标处理器对于单粒子翻转的敏感性大约为1.38%到2.35%,且寄存器的敏感性要高于内存区。

 
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