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   level simulation 在 计算机软件及计算机应用 分类中 的翻译结果: 查询用时:0.011秒
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level simulation
相关语句
  层仿真
    VHDL Level Simulation and Research of Switch Fabric
    交换结构的VHDL层仿真研究
短句来源
    Moreover, because the VHDL level simulation is based on hardware behavior, the results are more precise and more reliable than the ordinary simulation using C language.
    并且因为 VHDL 层仿真直接对应硬件的行为 ,所以其结果比普通的 C语言仿真结果更为精确和可靠
短句来源
    VHDL level simulation is very important and indispensable in designing switch fabric.
    交换结构的 VHDL 层仿真是在交换结构的设计中非常重要和不可缺少的一步 .
短句来源
  “level simulation”译为未确定词的双语例句
    System level simulation methodology is proposed for the 4G wireless system.
    提出4G无线通信系统的仿真方法。
短句来源
    AN INVESTIGATION ON INSTRUCTION LEVEL SIMULATION
    数字系统指令级模拟的研究
短句来源
    In worm traffic simulation, the worm propagation is simulated with themixed abstraction level simulation model, and the scanning traffic of worm host is simulated with the periodic burst traffic model.
    在蠕虫流量模拟中,采用混合抽象层框架来模拟蠕虫传播过程,采用周期性突发流量模型来模拟蠕虫主机的扫描流量;
短句来源
    There are two main items in this dissertation, they are micro-strip line coupler equivalent lumped-elements study and RFID transceiver receiver architecture system level design study. System perspectives, that taking into account all of the behaviors of a system as a whole in the context of its environment, is studied theoretically with the help of ADS system level simulation tools.
    本论文主体涉及两个方面:射频前端收发分离器件研究和接收机射频拓扑结构研究,射频前端收发分离器件研究即从微带线集总元件等效的角度出发,为前端设计提供一个可行的设计参考,接收机射频拓扑结构的研究是在研究传统收发信机拓扑结构的基础上,针对RFID读写器拓扑结构设计进行了相关研究。 通过系统级设计仿真,初步构建系统射频前端拓扑结构的同时,为原理样机筛选了核心器件。
短句来源
    In the paper the design principle and some key techniques to solve the problems on the implementation of the VHDL parser are introduced. According to the methods discussed in the paper, the VHDL parser based on VHDL IEEE 1076 standard version is implemented and a series of strict tests are done. This VHDL parser is front-end tool of the VHDL high level synthesis and mixed level simulation system developed by the Research Center of ASIC of BIT.
    VHDL语言及其支撑环境是逻辑设计自动化中的活跃领域,本文论述了VHDL语言分析器的设计原理及实现中的关键技术.按照文中的方法,已实现了基于VHDLIEEE1076标准版本的VHDL语言分析器并对其进行了一系列严格的测试,该VHDL语言分析器是北京理工大学计算机科学与工程系开发的VHDL高级综合及混合模拟系统的重要组成部分.
短句来源
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  level simulation
This paper describes network level simulation results for Enhanced UMTS.
      
Through statistical analysis of link-level simulation results, system-level performances of the techniques such as geographical distribution of BER and FER in the area of interest can also be evaluated.
      
A system level simulator isbuilt to utilise the link level simulation results andto show the increase in cellular capacity obtained byusing multiuser detection.
      
We discuss these model calibration mechanisms in the context of our Sesame system-level simulation framework.
      
Mesoscopic-level Simulation of Dynamics and Interactions of Biological Molecules Using Monte Carlo Simulation
      
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A new analytical model and some algorithms based on the conventional gate-level simulation are presented in this article. For a given unit control sequence, the time relation of the unit in the worst case can be accurately obtained by computing once only with U-mode data. Therefore, this model and algorithms can provide a fast and accurate way of time relation checking, and the same effect as conventional ones in functional checking.

本文在传统的门级逻辑模拟模型和算法的基础上引进了一些新概念,导出了一种新的分析模型和算法。对于给定的部件控制时序,用U-型数据,仅一次便可准确地计算出该部件最坏情况下的时间关系。因此,当用作时间关系检查时,它具有既快又准的特色;当用作功能检查时,效果与传统模型和算法相同。

The instruction level simulation discussed in this paper is a system simulation for a CPU, and is also an effective software debugging tool. A fast sequtial propagation algorithm is presented, and an interactive simulation system is set up. Some practical results are briefly discribed.

本文论述的指令级模拟,是计算机主机的一种系统模拟,也可作为一种有效的软件调试工具。本文提出了一个快速的面向指令进程的顺序繁衍算法,并建立了一个交互模拟系统。该模拟系统解释执行的用户程序可以有机地组织在一个直接执行的用户大型问题中。本文还描述了一套特别适于软件调试的模拟控制命令,扼要介绍了某些实践成果。

With the development at top speed of VLSI technology, especially the appearance of RISC and ASIC, behavior funclion level simulation has becomc a necessary tool of digital system designers.This paper presents a powerful and pract ical CAD tool for designers-behavior function level simulation system (BFLSIM). In this paper , we systematically discuss the function, the structure, the characte ristics and simulation model of BFLSIM. In the end, we introduce a flexible and convenient user's interface-DCL...

With the development at top speed of VLSI technology, especially the appearance of RISC and ASIC, behavior funclion level simulation has becomc a necessary tool of digital system designers.This paper presents a powerful and pract ical CAD tool for designers-behavior function level simulation system (BFLSIM). In this paper , we systematically discuss the function, the structure, the characte ristics and simulation model of BFLSIM. In the end, we introduce a flexible and convenient user's interface-DCL and DEBUG environments, which can increase the system efficience and practicality.

随着VLSI技术的高速发展,特别是RISC和ASIC的出现,行为功能级模拟已成为数字系统设计人员的必要工具。本文叙述了一个实用的功能强大的CAD工具—行为功能级模拟系统BFLSIM,并系统地讨论了BFLSIM的功能、结构、特性和模拟模型,最后介绍了一个灵活方便的用户接口—DCL和DEBUG环境,提高了系统效率和实用性。

 
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