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bit和bit
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  bit and bit
     Multiplayer ferroelectric thin films BIT/PZT/BIT,PZT/BIT and BIT were deposited on (100) ptype silicon wafers by pulsed excimer laser. IV loop and PV loop were obtained.
     利用准分子激光原位淀积方法制备了BIT/PZT/BIT,PZT/BIT和BIT层状铁电薄膜,获得了电流密度-电压(I-V)回线和极化强度P-V电滞回线。
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  “bit和bit”译为未确定词的双语例句
     A modified empirical power law I=A(ξV) α and an approximate formula of I V curve of the multilayer ferroelectric thin films have been built up. It consists of the coefficient of nonlinearity of I V curve α and the parameter charactering the voltage drop of the interface, ξ .
     利用准分子激光原位淀积法制备了 BIT/ PZT/ BIT,PZT/ BIT和 BIT层状铁电薄膜 ,建立了一条修正的经验幂定律 I=A(ξ V) α和一个层状铁电薄膜电流密度 -电压 (I- V)曲线的近似公式 ,它包括了的非线性系数α和界面电位降特征参数 ξ。
短句来源
     The Bi 4Ti 3O 12 (BIT)/PbZr 0 4 Ti 0 6 O 3(PZT)/BIT,BIT/PZT/BIT ferroelectric thin films were successfully deposited on p Si(100) at 680 °C (BIT)and 530 °C(PZT) in an ambient pressure of 27 Pa by pulsed excimer laser.
     采用脉冲准分子激光工艺在Si(100)单晶基片上,成功地淀积了BIT、PZT/BIT和BIT/PZT/BIT等多层结构的铁电薄膜。
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  相似匹配句对
     Intelligent BIT Technologies
     智能BIT技术
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     Development Tendency of BIT
     BIT的发展趋势
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     The Development Trends of BIT and ATE
     BITATE的发展趋势
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     Development of Analog and Mixed Signal BIT Technology
     模拟混合信号BIT技术
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Ferroelectric BIT/PZT/BIT,and PZT/BIT,and BIT multilayer ferroelectric thin films were deposited on(100)p type wafers by pulsed excimer laser the built in voltages at the interface of the multilayer ferroelectric films were discussed three structure capacitors have three different Δ V b,among the three structures,the Δ V b,of the Au/BIT/PZT/TBIT/p Si(100) is the smallest and the Δ V b of the Au/BIT/p Si(100)is the largest,the value of Au/PZT/TBIT/p Si(100) is about the same of Au/PZT/p Si(100)...

Ferroelectric BIT/PZT/BIT,and PZT/BIT,and BIT multilayer ferroelectric thin films were deposited on(100)p type wafers by pulsed excimer laser the built in voltages at the interface of the multilayer ferroelectric films were discussed three structure capacitors have three different Δ V b,among the three structures,the Δ V b,of the Au/BIT/PZT/TBIT/p Si(100) is the smallest and the Δ V b of the Au/BIT/p Si(100)is the largest,the value of Au/PZT/TBIT/p Si(100) is about the same of Au/PZT/p Si(100) The asymmetric degree of rectification behavior of I V curve,and an in imprint failure of P V loop of Au/BIT/PZT/TBIT/p Si(100) were the smallest and that of the Au/BIT/p Si(100) were the largest

利用准分子激光在 p型硅薄片上淀积了多层铁电薄膜 BIT/ PZT/ BIT、PZT/ BIT和 BIT。讨论了多层铁电薄膜界面内建电压 ,其中 Au/ BIT/ PZT/ TBIT/ p- Si(10 0 )的 ΔVb 最小而 Au/ BIT/ p- Si(10 0 )的 ΔVb 最大 ,但Au/ BIT/ PZT/ TBIT/ p- Si(10 0 )的ΔVb 与 Au/ BIT/ p- Si(10 0 )的Δ Vb 相差不多。 Au/ BIT/ PZT/ TBIT/ p- Si(10 0 )的I- V特性曲线非对称的整流特性和 P- V回线的刻印失效是最小的而 Au/ BIT/ p- Si(10 0 )的则是最大的

A modified empirical power law I=A(ξV) α and an approximate formula of I V curve of the multilayer ferroelectric thin films have been built up.It consists of the coefficient of nonlinearity of I V curve α and the parameter charactering the voltage drop of the interface, ξ .The voltage drop at the interface, V i,obtained from the empirical power law and the approximate calculation of the I V curve is consistent with that obtained form the C V curve theory.The voltage drop of...

A modified empirical power law I=A(ξV) α and an approximate formula of I V curve of the multilayer ferroelectric thin films have been built up.It consists of the coefficient of nonlinearity of I V curve α and the parameter charactering the voltage drop of the interface, ξ .The voltage drop at the interface, V i,obtained from the empirical power law and the approximate calculation of the I V curve is consistent with that obtained form the C V curve theory.The voltage drop of interface is relevant to the measured capacitance,the film capacitance and the depletion capacitance.

利用准分子激光原位淀积法制备了 BIT/ PZT/ BIT,PZT/ BIT和 BIT层状铁电薄膜 ,建立了一条修正的经验幂定律 I=A(ξ V) α和一个层状铁电薄膜电流密度 -电压 (I- V)曲线的近似公式 ,它包括了的非线性系数α和界面电位降特征参数 ξ。由修正的经验幂定律和 I- V曲线近似公式算出的界面电位降 Vi 与由 C- V曲线理论得出的结果一致。界面电位降与测量电容、薄膜电容及耗尽层电容有关。

Multiplayer ferroelectric thin films BIT/PZT/BIT,PZT/BIT and BIT were deposited on (100) ptype silicon wafers by pulsed excimer laser.IV loop and PV loop were obtained.Among three structures,the voltage drop and built in voltage anad frequency effect at the interface of Au/BIT/PZT/BIT/pSi(100) is the smallest.There are three relations between VT,Ps and Vc,which are the conditions of the match relation between IV loop and PV loop,which maintains that this memory operated IV loop will...

Multiplayer ferroelectric thin films BIT/PZT/BIT,PZT/BIT and BIT were deposited on (100) ptype silicon wafers by pulsed excimer laser.IV loop and PV loop were obtained.Among three structures,the voltage drop and built in voltage anad frequency effect at the interface of Au/BIT/PZT/BIT/pSi(100) is the smallest.There are three relations between VT,Ps and Vc,which are the conditions of the match relation between IV loop and PV loop,which maintains that this memory operated IV loop will enable nonvolatile memory,nondestructive readout and retention.

利用准分子激光原位淀积方法制备了BIT/PZT/BIT,PZT/BIT和BIT层状铁电薄膜,获得了电流密度-电压(I-V)回线和极化强度P-V电滞回线。在这三种结构中,Au/BIT/PZT/BIT/p-Si(100)结构的界面电位降、内建电压及频率效应是最小的。在电压转变电VT、饱和极化强度PS及矫顽场VC之间有三种关系,他们与I-V回线及P-V回线的关系相匹配,这种匹配关系使得以I-V回线操作的存储器将能够非挥发和非破坏读出及具有保持力。

 
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